October 2021 - flashrom-gerrit

Change in flashrom[master]: [RFC] writeprotect: implement wp_get_mode() and wp_set_mode()
by Nikolai Artemiev (Code Review) 29 Oct '21

29 Oct '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58483 to look at the new patch set (#6). Change subject: [RFC] writeprotect: implement wp_get_mode() and wp_set_mode() ...................................................................... [RFC] writeprotect: implement wp_get_mode() and wp_set_mode() BUG=b:195381327,b:153800563 TEST=flashrom --wp-{enable,disable,status} BRANCH=none Change-Id: I7b68e940f0e1359281806c98e1da119b4caf8405 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M cli_classic.c M writeprotect.c M writeprotect.h 3 files changed, 129 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/83/58483/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/58483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7b68e940f0e1359281806c98e1da119b4caf8405 Gerrit-Change-Number: 58483 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC] writeprotect: implement wp_{get,set}_range()
by Nikolai Artemiev (Code Review) 29 Oct '21

29 Oct '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58482 to look at the new patch set (#6). Change subject: [RFC] writeprotect: implement wp_{get,set}_range() ...................................................................... [RFC] writeprotect: implement wp_{get,set}_range() BUG=b:195381327,b:153800563 TEST=flashrom --wp-{status,range} BRANCH=none Change-Id: I7d26f43fb05c5828b9839bb57a28fa1088dcd9a0 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M cli_classic.c M writeprotect.c M writeprotect.h 3 files changed, 61 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/82/58482/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/58482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7d26f43fb05c5828b9839bb57a28fa1088dcd9a0 Gerrit-Change-Number: 58482 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC] writeprotect: implement wp_get_ranges()
by Nikolai Artemiev (Code Review) 29 Oct '21

29 Oct '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58481 to look at the new patch set (#6). Change subject: [RFC] writeprotect: implement wp_get_ranges() ...................................................................... [RFC] writeprotect: implement wp_get_ranges() Generate list of available ranges by enumerating all possible values that range bits (BPx, TB, ...) can take and using the chip's range decoding function to get the range associated with each one. BUG=b:195381327,b:153800563 TEST=flashrom --wp-list BRANCH=none Change-Id: Id51f038f03305c8536d80313e52f77d27835f34d Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M writeprotect.c M writeprotect.h 2 files changed, 119 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/81/58481/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/58481 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id51f038f03305c8536d80313e52f77d27835f34d Gerrit-Change-Number: 58481 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC] flashchips, writeprotect_ranges: add range decoding function
by Nikolai Artemiev (Code Review) 29 Oct '21

29 Oct '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58480 to look at the new patch set (#7). Change subject: [RFC] flashchips, writeprotect_ranges: add range decoding function ...................................................................... [RFC] flashchips, writeprotect_ranges: add range decoding function Allow chips to specify functions that map status register bits to protection ranges. These are used to enumerate available ranges and determine the protection state of chips. The patch also adds a range decoding function for the example chips. Many other chips can also be handled by it, though some will require different functions (e.g. MX25L6406 and related chips). Another approach that has been tried in cros flashrom is maintaining tables of range data, but it quickly becomes error prone and hard to validate. Using a function to interpret the ranges allows compact encoding with most chips and is flexible enough to allow chips with less predictable ranges to be handled as well. BUG=b:195381327,b:153800563 TEST=dumped range tables, checked against datasheets BRANCH=none Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M Makefile M chipdrivers.h M flash.h M flashchips.c M meson.build A writeprotect_ranges.c 6 files changed, 109 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/80/58480/7 -- To view, visit https://review.coreboot.org/c/flashrom/+/58480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id163ed80938a946a502ed116e48e8236e36eb203 Gerrit-Change-Number: 58480 Gerrit-PatchSet: 7 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC] writeprotect: add functions to read and write wp_chip_state
by Nikolai Artemiev (Code Review) 29 Oct '21

29 Oct '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58479 to look at the new patch set (#6). Change subject: [RFC] writeprotect: add functions to read and write wp_chip_state ...................................................................... [RFC] writeprotect: add functions to read and write wp_chip_state The functions map between register values and `struct wp_chip_state` using the chip's register bit map. All currently supported chips can be handled with a single pair of read/write functions, though an option for chips to override them might be necessary in the future. BUG=b:195381327,b:153800563 TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series BRANCH=none Change-Id: I3ad25708c3321b8fb0216c3eaf6ffc07616537ad Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M writeprotect.c 1 file changed, 132 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/79/58479/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/58479 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I3ad25708c3321b8fb0216c3eaf6ffc07616537ad Gerrit-Change-Number: 58479 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC] writeprotect: add structure to represent chip wp state
by Nikolai Artemiev (Code Review) 29 Oct '21

29 Oct '21

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58478 to look at the new patch set (#6). Change subject: [RFC] writeprotect: add structure to represent chip wp state ...................................................................... [RFC] writeprotect: add structure to represent chip wp state This patch adds `struct wp_chip_state` to represent the writeprotect configuration of a chip. It will be used as a common representation throughout wp code for the current state of a chip as well as the modifications that should be written back to a chip. This allows operations that query a chip's wp configuration to reuse the read function and operations that modify the wp configuration to reuse the read and write functions. Supporting other chips may require additional fields to be added to the structure. BUG=b:195381327,b:153800563 TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series BRANCH=none Change-Id: I17dee630248ce7b51e624a6e46d7097d5d0de809 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M writeprotect.h 1 file changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/58478/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/58478 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I17dee630248ce7b51e624a6e46d7097d5d0de809 Gerrit-Change-Number: 58478 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: [RFC] writeprotect, cli_classic: delete old writeprotect code
by Nikolai Artemiev (Code Review) 29 Oct '21

29 Oct '21

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Nikolai Artemiev. Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/58474 to look at the new patch set (#6). Change subject: [RFC] writeprotect, cli_classic: delete old writeprotect code ...................................................................... [RFC] writeprotect, cli_classic: delete old writeprotect code Delete writeprotect code that was previously extracted from the cros tree. This is the first of a series of commits that adds working writeprotect support. Following commits will incrementally implement writeprotect operations, culminating in writeprotect support for a set of example chips: GD25LQ128, GD25Q32, GD25Q64, GD25Q256, MX25L2006E, and W25X40. BUG=b:195381327,b:153800563 TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series BRANCH=none Change-Id: I67e9b31f86465e5a8f7d3def637198671ee818a8 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M cli_classic.c M flash.h M writeprotect.c M writeprotect.h 4 files changed, 25 insertions(+), 480 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/58474/6 -- To view, visit https://review.coreboot.org/c/flashrom/+/58474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I67e9b31f86465e5a8f7d3def637198671ee818a8 Gerrit-Change-Number: 58474 Gerrit-PatchSet: 6 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: ichspi: Split very long init function into two
by Anastasia Klimchuk (Code Review) 29 Oct '21

29 Oct '21

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58735 ) Change subject: ichspi: Split very long init function into two ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I have an end goal of removing global state from ichspi, and also I want to write a test for it. I think it will take a while to accomplish. I plan to move in small steps and test changes on devices that are available. -- To view, visit https://review.coreboot.org/c/flashrom/+/58735 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6789bc456a4878e6555831ae0b80ecbdbf62938b Gerrit-Change-Number: 58735 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 29 Oct 2021 04:55:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: ichspi: Extract initialisation of swseq and hwseq into a function
by Anastasia Klimchuk (Code Review) 29 Oct '21

29 Oct '21

Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/58737 ) Change subject: ichspi: Extract initialisation of swseq and hwseq into a function ...................................................................... ichspi: Extract initialisation of swseq and hwseq into a function Initialisation of swseq_data and hwseq_data gets its own function, which is called from init_ich_default. This makes init_ich_default more readable. This patch also gives a name to (previously anonymous) struct swseq_data. Its sibling struct hwseq_data already has a name. Structs need names to be able to daclare function parameters. TEST ME ON HW BUG=b:204488958 Change-Id: I7d62b1b380e497b82dcae1284d752204cc541bd3 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M ichspi.c 1 file changed, 54 insertions(+), 48 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/37/58737/1 diff --git a/ichspi.c b/ichspi.c index 7a9c5cd..0966ec6 100644 --- a/ichspi.c +++ b/ichspi.c @@ -504,7 +504,7 @@ pprint_reg(DLOCK, SSEQ_LOCKDN, reg_val, "\n"); } -static struct { +static struct swseq_data { size_t reg_ssfsc; size_t reg_preop; size_t reg_optype; @@ -1782,6 +1782,58 @@ return 0; } +static void init_swseq_hwseq(struct swseq_data *swseq, struct hwseq_data *hwseq, + size_t *num_freg, size_t *num_pr, size_t *reg_pr0, + enum ich_chipset ich_gen) +{ + /* Moving registers / bits */ + switch (ich_gen) { + case CHIPSET_100_SERIES_SUNRISE_POINT: + case CHIPSET_C620_SERIES_LEWISBURG: + case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: + *num_pr = 6; /* Includes GPR0 */ + *reg_pr0 = PCH100_REG_FPR0; + swseq->reg_ssfsc = PCH100_REG_SSFSC; + swseq->reg_preop = PCH100_REG_PREOP; + swseq->reg_optype = PCH100_REG_OPTYPE; + swseq->reg_opmenu = PCH100_REG_OPMENU; + hwseq->addr_mask = PCH100_FADDR_FLA; + hwseq->only_4k = true; + hwseq->hsfc_fcycle = PCH100_HSFC_FCYCLE; + break; + default: + *num_pr = 5; + *reg_pr0 = ICH9_REG_PR0; + swseq->reg_ssfsc = ICH9_REG_SSFS; + swseq->reg_preop = ICH9_REG_PREOP; + swseq->reg_optype = ICH9_REG_OPTYPE; + swseq->reg_opmenu = ICH9_REG_OPMENU; + hwseq->addr_mask = ICH9_FADDR_FLA; + hwseq->only_4k = false; + hwseq->hsfc_fcycle = HSFC_FCYCLE; + break; + } + switch (ich_gen) { + case CHIPSET_100_SERIES_SUNRISE_POINT: + *num_freg = 10; + break; + case CHIPSET_C620_SERIES_LEWISBURG: + *num_freg = 12; /* 12 MMIO regs, but 16 regions in FD spec */ + break; + case CHIPSET_300_SERIES_CANNON_POINT: + case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_APOLLO_LAKE: + case CHIPSET_GEMINI_LAKE: + *num_freg = 16; + break; + default: + *num_freg = 5; + break; + } +} static int init_ich_default(void *spibar, enum ich_chipset ich_gen) { @@ -1798,53 +1850,7 @@ ich_generation = ich_gen; ich_spibar = spibar; - /* Moving registers / bits */ - switch (ich_gen) { - case CHIPSET_100_SERIES_SUNRISE_POINT: - case CHIPSET_C620_SERIES_LEWISBURG: - case CHIPSET_300_SERIES_CANNON_POINT: - case CHIPSET_400_SERIES_COMET_POINT: - case CHIPSET_APOLLO_LAKE: - case CHIPSET_GEMINI_LAKE: - num_pr = 6; /* Includes GPR0 */ - reg_pr0 = PCH100_REG_FPR0; - swseq_data.reg_ssfsc = PCH100_REG_SSFSC; - swseq_data.reg_preop = PCH100_REG_PREOP; - swseq_data.reg_optype = PCH100_REG_OPTYPE; - swseq_data.reg_opmenu = PCH100_REG_OPMENU; - hwseq_data.addr_mask = PCH100_FADDR_FLA; - hwseq_data.only_4k = true; - hwseq_data.hsfc_fcycle = PCH100_HSFC_FCYCLE; - break; - default: - num_pr = 5; - reg_pr0 = ICH9_REG_PR0; - swseq_data.reg_ssfsc = ICH9_REG_SSFS; - swseq_data.reg_preop = ICH9_REG_PREOP; - swseq_data.reg_optype = ICH9_REG_OPTYPE; - swseq_data.reg_opmenu = ICH9_REG_OPMENU; - hwseq_data.addr_mask = ICH9_FADDR_FLA; - hwseq_data.only_4k = false; - hwseq_data.hsfc_fcycle = HSFC_FCYCLE; - break; - } - switch (ich_gen) { - case CHIPSET_100_SERIES_SUNRISE_POINT: - num_freg = 10; - break; - case CHIPSET_C620_SERIES_LEWISBURG: - num_freg = 12; /* 12 MMIO regs, but 16 regions in FD spec */ - break; - case CHIPSET_300_SERIES_CANNON_POINT: - case CHIPSET_400_SERIES_COMET_POINT: - case CHIPSET_APOLLO_LAKE: - case CHIPSET_GEMINI_LAKE: - num_freg = 16; - break; - default: - num_freg = 5; - break; - } + init_swseq_hwseq(&swseq_data, &hwseq_data, &num_freg, &num_pr, &reg_pr0, ich_gen); int ret = get_ich_spi_mode_param(&ich_spi_mode); if (ret) -- To view, visit https://review.coreboot.org/c/flashrom/+/58737 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7d62b1b380e497b82dcae1284d752204cc541bd3 Gerrit-Change-Number: 58737 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: ichspi: Extract handling programmer param into a function
by Anastasia Klimchuk (Code Review) 29 Oct '21

29 Oct '21

Anastasia Klimchuk has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/58736 ) Change subject: ichspi: Extract handling programmer param into a function ...................................................................... ichspi: Extract handling programmer param into a function Extract processing of ich_spi_mode into a separate function which is called from init_ich_default. This makes init_ich_default more readable and avoids one local variable. TEST ME ON HW BUG=b:204488958 Change-Id: I20e2379a6fd58c9346f0a2d6daf2b8decf1f6976 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M ichspi.c 1 file changed, 38 insertions(+), 27 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/36/58736/1 diff --git a/ichspi.c b/ichspi.c index 9db241c..7a9c5cd 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1749,20 +1749,49 @@ return 0; } +enum ich_spi_mode { + ich_auto, + ich_hwseq, + ich_swseq +}; + +static int get_ich_spi_mode_param(enum ich_spi_mode *ich_spi_mode) +{ + char *arg = extract_programmer_param("ich_spi_mode"); + if (arg && !strcmp(arg, "hwseq")) { + *ich_spi_mode = ich_hwseq; + msg_pspew("user selected hwseq\n"); + } else if (arg && !strcmp(arg, "swseq")) { + *ich_spi_mode = ich_swseq; + msg_pspew("user selected swseq\n"); + } else if (arg && !strcmp(arg, "auto")) { + msg_pspew("user selected auto\n"); + *ich_spi_mode = ich_auto; + } else if (arg && !strlen(arg)) { + msg_perr("Missing argument for ich_spi_mode.\n"); + free(arg); + return ERROR_FATAL; + } else if (arg) { + msg_perr("Unknown argument for ich_spi_mode: %s\n", + arg); + free(arg); + return ERROR_FATAL; + } + free(arg); + + return 0; +} + + static int init_ich_default(void *spibar, enum ich_chipset ich_gen) { unsigned int i; uint16_t tmp2; uint32_t tmp; - char *arg; int ich_spi_rw_restricted = 0; int desc_valid = 0; struct ich_descriptors desc = { 0 }; - enum ich_spi_mode { - ich_auto, - ich_hwseq, - ich_swseq - } ich_spi_mode = ich_auto; + enum ich_spi_mode ich_spi_mode = ich_auto; size_t num_freg, num_pr, reg_pr0; @@ -1817,27 +1846,9 @@ break; } - arg = extract_programmer_param("ich_spi_mode"); - if (arg && !strcmp(arg, "hwseq")) { - ich_spi_mode = ich_hwseq; - msg_pspew("user selected hwseq\n"); - } else if (arg && !strcmp(arg, "swseq")) { - ich_spi_mode = ich_swseq; - msg_pspew("user selected swseq\n"); - } else if (arg && !strcmp(arg, "auto")) { - msg_pspew("user selected auto\n"); - ich_spi_mode = ich_auto; - } else if (arg && !strlen(arg)) { - msg_perr("Missing argument for ich_spi_mode.\n"); - free(arg); - return ERROR_FATAL; - } else if (arg) { - msg_perr("Unknown argument for ich_spi_mode: %s\n", - arg); - free(arg); - return ERROR_FATAL; - } - free(arg); + int ret = get_ich_spi_mode_param(&ich_spi_mode); + if (ret) + return ret; tmp2 = mmio_readw(spibar + ICH9_REG_HSFS); msg_pdbg("0x04: 0x%04x (HSFS)\n", tmp2); -- To view, visit https://review.coreboot.org/c/flashrom/+/58736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I20e2379a6fd58c9346f0a2d6daf2b8decf1f6976 Gerrit-Change-Number: 58736 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newchange

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flashrom-gerrit October 2021