flashrom-gerrit October 2021

flashrom-gerrit@flashrom.org

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Change in flashrom[master]: dediprog.c: Split up compound conditional and swap two operations
by Nico Huber (Code Review) 01 Oct '21

01 Oct '21

Attention is currently required from: Edward O'Callaghan, Angel Pons, Anastasia Klimchuk. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/51706 ) Change subject: dediprog.c: Split up compound conditional and swap two operations ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/51706 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib7e0179da39279e32a8497466b044b69ec836da8 Gerrit-Change-Number: 51706 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 01 Oct 2021 11:10:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: chipset_enable.c: Add Ids for recent Intel chipsets
by Nico Huber (Code Review) 01 Oct '21

01 Oct '21

Attention is currently required from: Bora Guvendik, Anil Kumar K, Paul Menzel, Edward O'Callaghan, Angel Pons, Nikolai Artemiev, Anastasia Klimchuk. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/57560 ) Change subject: chipset_enable.c: Add Ids for recent Intel chipsets ...................................................................... Patch Set 7: (2 comments) Patchset: PS7: Anil, thanks for your patch. It's nice to see that Intel gets involved with flashrom. Before adding IDs for new chipset generations, we have to check if the selected code paths are compatible, as we want to keep the code base as consistent as possible. Maybe it's best to add one generation at a time in separate commits. Tiger Lake already has such a commit on Gerrit btw. (CB:55578). Ice Lake, Jasper Lake and Alder Lake still need to be looked into, I guess. Some hints how to add new Intel chipset generations: * Generally one needs the EDS and the SPI Programming Guide. * The function pointer in the PCI device table indirectly sets the generation (one of `enum ich_chipset`). For instance, CHIPSET_100_SERIES_SUNRISE_POINT. Not every new generation needs its own enum entry, but one should have a look if all code paths taken for a given entry match the new hardware. If there is no 100% compatible enum entry, then it's time to add a new one. * We also try to keep track of changes in the Flash Descriptor. And as Intel didn't give it a version number or anything like that, we try to detect the version by its contents (cf. guess_ich_chipset_from_content()). This is sometimes very fiddly, let us know if you need help with it. tl;dr Follow all the if and switch/case statements for `enum ich_chipset` to see what matches the new hardware and descriptor. File chipset_enable.c: https://review.coreboot.org/c/flashrom/+/57560/comment/c602f86c_892851da PS7, Line 2018: {0x8086, 0xa224, B_FS, OK, "Intel", "Lewisburg", enable_flash_pch100}, : {0x8086, 0x9da4, B_FS, OK, "Intel", "Cannonlake", enable_flash_pch100}, : {0x8086, 0x34a4, B_FS, OK, "Intel", "Icelake", enable_flash_pch100}, : {0x8086, 0x4da4, B_FS, OK, "Intel", "Jasperlake", enable_flash_pch100}, : {0x8086, 0xa0a4, B_FS, OK, "Intel", "Tigerlake", enable_flash_pch100}, : {0x8086, 0x7aa4, B_FS, OK, "Intel", "Alderlake-S", enable_flash_pch100}, : {0x8086, 0x51a4, B_FS, OK, "Intel", "Alderlake-P / M", enable_flash_pch100}, > flashrom uses LPC/eSPI PCI IDs instead of SPI PCI IDs. The SPI PCI device is not always visible, and didn't exist before Sunrise Point. If intel could provide documentation on what chipsets the SPI device is guaranteed to be visible, that would be nice. Then we could save us adding all the LPC/eSPI IDs for these chipsets. I just checked a Tiger Lake EDS and the bit to hide the device is reserved now. -- To view, visit https://review.coreboot.org/c/flashrom/+/57560 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iff387076567e639485ac15c25c1bcc8c37a07037 Gerrit-Change-Number: 57560 Gerrit-PatchSet: 7 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: AndreX Andraos <andrex.andraos(a)intel.com> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-CC: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Nikolai Artemiev <nartemiev(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Fri, 01 Oct 2021 10:57:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: comment

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flashrom-gerrit October 2021