Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/58037 )
Change subject: ch341a: use better english in the debug message
......................................................................
ch341a: use better english in the debug message
Change-Id: Ib7f15aa36fedc6af990c3ca45e81547cbfde24a1
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58037
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org>
---
M ch341a_spi.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Paul Menzel: Looks good to me, but someone else must approve
Angel Pons: Looks good to me, approved
diff --git a/ch341a_spi.c b/ch341a_spi.c
index 48642f3..bc4112b 100644
--- a/ch341a_spi.c
+++ b/ch341a_spi.c
@@ -450,7 +450,7 @@
ret = libusb_set_auto_detach_kernel_driver(handle, 1);
if (ret != 0) {
msg_pwarn("Platform does not support detaching of USB kernel drivers.\n"
- "If an unsupported driver is active, claiming of the interface may fail.\n");
+ "If an unsupported driver is active, claiming the interface may fail.\n");
}
ret = libusb_claim_interface(handle, 0);
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ib7f15aa36fedc6af990c3ca45e81547cbfde24a1
Gerrit-Change-Number: 58037
Gerrit-PatchSet: 2
Gerrit-Owner: Thomas Heijligen <src(a)posteo.de>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: merged
Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/51706 )
Change subject: dediprog.c: Split up compound conditional and swap two operations
......................................................................
dediprog.c: Split up compound conditional and swap two operations
register_spi_master now becomes the last operation in init function,
which is consistent with other spi masters.
In addition, the patch fixes propagation of register_spi_master return
values, which is also consistent with other spi masters.
TEST=ninja test
Change-Id: Ib7e0179da39279e32a8497466b044b69ec836da8
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/51706
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Nico Huber <nico.h(a)gmx.de>
---
M dediprog.c
1 file changed, 3 insertions(+), 3 deletions(-)
Approvals:
build bot (Jenkins): Verified
Nico Huber: Looks good to me, approved
Angel Pons: Looks good to me, but someone else must approve
diff --git a/dediprog.c b/dediprog.c
index a1d9972..85b78c8 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -1300,10 +1300,10 @@
if (protocol(dp_data) >= PROTOCOL_V2)
spi_master_dediprog.features |= SPI_MASTER_4BA;
- if (register_spi_master(&spi_master_dediprog, dp_data) || dediprog_set_leds(LED_NONE, dp_data))
- return 1; /* shutdown function does cleanup */
+ if (dediprog_set_leds(LED_NONE, dp_data))
+ goto init_err_cleanup_exit;
- return 0;
+ return register_spi_master(&spi_master_dediprog, dp_data);
init_err_cleanup_exit:
dediprog_shutdown(dp_data);
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Ib7e0179da39279e32a8497466b044b69ec836da8
Gerrit-Change-Number: 51706
Gerrit-PatchSet: 3
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
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Gerrit-MessageType: merged
Attention is currently required from: Bora Guvendik, Anil Kumar K, Paul Menzel, Edward O'Callaghan, Angel Pons, Nikolai Artemiev, Anastasia Klimchuk.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/57560 )
Change subject: chipset_enable.c: Add Ids for recent Intel chipsets
......................................................................
Patch Set 7:
(2 comments)
Patchset:
PS7:
Anil, thanks for your patch. It's nice to see that Intel gets involved
with flashrom. Before adding IDs for new chipset generations, we have
to check if the selected code paths are compatible, as we want to keep
the code base as consistent as possible. Maybe it's best to add one
generation at a time in separate commits. Tiger Lake already has such
a commit on Gerrit btw. (CB:55578). Ice Lake, Jasper Lake and Alder Lake
still need to be looked into, I guess.
Some hints how to add new Intel chipset generations:
* Generally one needs the EDS and the SPI Programming Guide.
* The function pointer in the PCI device table indirectly sets the generation (one of `enum ich_chipset`). For instance, CHIPSET_100_SERIES_SUNRISE_POINT. Not every new generation needs its own enum entry, but one should have a look if all code paths taken for a given entry match the new hardware. If there is no 100% compatible enum entry, then it's time to add a new one.
* We also try to keep track of changes in the Flash Descriptor. And as Intel didn't give it a version number or anything like that, we try to detect the version by its contents (cf. guess_ich_chipset_from_content()). This is sometimes very fiddly, let us know if you need help with it.
tl;dr
Follow all the if and switch/case statements for `enum ich_chipset` to see
what matches the new hardware and descriptor.
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/57560/comment/c602f86c_892851da
PS7, Line 2018: {0x8086, 0xa224, B_FS, OK, "Intel", "Lewisburg", enable_flash_pch100},
: {0x8086, 0x9da4, B_FS, OK, "Intel", "Cannonlake", enable_flash_pch100},
: {0x8086, 0x34a4, B_FS, OK, "Intel", "Icelake", enable_flash_pch100},
: {0x8086, 0x4da4, B_FS, OK, "Intel", "Jasperlake", enable_flash_pch100},
: {0x8086, 0xa0a4, B_FS, OK, "Intel", "Tigerlake", enable_flash_pch100},
: {0x8086, 0x7aa4, B_FS, OK, "Intel", "Alderlake-S", enable_flash_pch100},
: {0x8086, 0x51a4, B_FS, OK, "Intel", "Alderlake-P / M", enable_flash_pch100},
> flashrom uses LPC/eSPI PCI IDs instead of SPI PCI IDs. The SPI PCI device is not always visible, and didn't exist before Sunrise Point.
If intel could provide documentation on what chipsets the SPI device is
guaranteed to be visible, that would be nice. Then we could save us adding
all the LPC/eSPI IDs for these chipsets. I just checked a Tiger Lake EDS
and the bit to hide the device is reserved now.
--
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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Iff387076567e639485ac15c25c1bcc8c37a07037
Gerrit-Change-Number: 57560
Gerrit-PatchSet: 7
Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com>
Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
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