Change in coreboot[master]: soc/intel/denverton_ns: Fix MRC_RW_CACHE - coreboot-gerrit

14 Dec 2021


      Attention is currently required from: Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Kyösti Mälkki, Patrick Rudolph.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60091 )
Change subject: soc/intel/denverton_ns: Fix MRC_RW_CACHE
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Patch Set 1: Code-Review+1
(1 comment)
File src/soc/intel/denverton_ns/bootblock/bootblock.c:
https://review.coreboot.org/c/coreboot/+/60091/comment/944300c5_ef0a6cb7 
PS1, Line 15: #include <intelblocks/fast_spi.h>
Already included on line 8
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iacab44b00d08c9bdc18bc3bdcb88833634c0b02e
Gerrit-Change-Number: 60091
Gerrit-PatchSet: 1
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