[S] Change in coreboot[master]: soc/amd/picasso/acpi: move remaining parts of sb_pic0_fch.asl to soc.asl

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/75590?usp=email )

Change subject: soc/amd/picasso/acpi: move remaining parts of sb_pic0_fch.asl to soc.asl
......................................................................

soc/amd/picasso/acpi: move remaining parts of sb_pic0_fch.asl to soc.asl

Signed-off-by: Felix Held 
Change-Id: I785abfc90c99b58c11d57847573f550fcea1f774
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75590
Tested-by: build bot (Jenkins) 
Reviewed-by: Raul Rangel 
Reviewed-by: Matt DeVillier 
---
D src/soc/amd/picasso/acpi/sb_pci0_fch.asl
M src/soc/amd/picasso/acpi/soc.asl
2 files changed, 2 insertions(+), 9 deletions(-)

Approvals:
  Matt DeVillier: Looks good to me, approved
  Raul Rangel: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
deleted file mode 100644
index ead676d..0000000
--- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* System Bus */
-/*  _SB.PCI0 */
-
-/* 0:14.3 - LPC */
-#include <soc/amd/common/acpi/lpc.asl>
-#include <soc/amd/common/acpi/platform.asl>
diff --git a/src/soc/amd/picasso/acpi/soc.asl b/src/soc/amd/picasso/acpi/soc.asl
index 82c2766..0b520e4 100644
--- a/src/soc/amd/picasso/acpi/soc.asl
+++ b/src/soc/amd/picasso/acpi/soc.asl
@@ -9,7 +9,8 @@
    #include "northbridge.asl"

/* Describe the AMD Fusion Controller Hub */
-	#include "sb_pci0_fch.asl"
+	#include <soc/amd/common/acpi/lpc.asl>
+	#include <soc/amd/common/acpi/platform.asl>
 }

/* PCI IRQ mapping for the Southbridge */