Change in coreboot[master]: soc/intel/common: Add new IRQ block

[Nico Huber (Code Review)]

Attention is currently required from: Nico Huber, Furquan Shaikh, Martin Roth, Duncan Laurie, Aamir Bohra, Srinidhi N Kaushik, Patrick Rudolph.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49408 )

Change subject: soc/intel/common: Add new IRQ block
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Patch Set 3:

(9 comments)

File src/soc/intel/common/block/irq/irq.c:

https://review.coreboot.org/c/coreboot/+/49408/comment/474e39a4_871cf838 
PS3, Line 69: 			return entries[i].irq;
Put the for body in braces for consistency and balance?

https://review.coreboot.org/c/coreboot/+/49408/comment/971643fc_3ae193b8 
PS3, Line 82: 1
PCI_INT_A

https://review.coreboot.org/c/coreboot/+/49408/comment/4f3b6e56_57421fe1 
PS3, Line 87: 			return (enum pci_pin)(i + 1);
Put the for body in braces for consistency and balance?

https://review.coreboot.org/c/coreboot/+/49408/comment/f7959c12_717f38aa 
PS3, Line 87: i + 1
PCI_INT_A + i

no need for cast

https://review.coreboot.org/c/coreboot/+/49408/comment/34e8ed7f_6276491d 
PS3, Line 102: 	while (next != curr_idx) {
Assumes `current <= MAX_IRQ` to terminate.

https://review.coreboot.org/c/coreboot/+/49408/comment/7be0a03b_6329d140 
PS3, Line 119: 	dev = pcidev_path_on_root(devfn);
             : 	if (!dev) {
             : 		dummy.bus = &bus;
             : 		dummy.path.type = DEVICE_PATH_PCI;
             : 		dummy.path.pci.devfn = devfn;
             : 		dev = &dummy;
             : 	}
             : 
             : 	const uint8_t pin = pci_read_config8(dev, PCI_INTERRUPT_PIN);
Looks like calling pci_s_read_config8() directly would be easier here.

https://review.coreboot.org/c/coreboot/+/49408/comment/5f7741b3_24b98498 
PS3, Line 155: 					line = MIN_IRQ;
Why?

https://review.coreboot.org/c/coreboot/+/49408/comment/c4ef88ff_695fd316 
PS3, Line 186: 			int pin = get_pci_irq_pin(devfn);
This seems a bit fragile, `UNIQUE_IRQ` would have the requirement that no other fn
has the same pin set. Which is harder to verify. next_pin_for_slot() also does
not take potential future get_pci_irq_pin() results into account and relies on
the already set `entries` alone. It seems everything would be easier if we say
`UNIQUE_IRQ` requires all pins of a `slot` configurable and all fn's should be
set to `UNIQUE_IRQ`. That seems true for the TGL use-case at least.

https://review.coreboot.org/c/coreboot/+/49408/comment/ea6a1ead_400a569d 
PS3, Line 209: PIRQ
PIRQA