[XS] Change in coreboot[main]: soc/mediatek/common: Reduce eMMC clock frequency to 400 kHz

[Yidi Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Kiwi Liu, Mengqi Zhang, Paul Menzel, Yu-Ping Wu.

Yidi Lin has posted comments on this change by Kiwi Liu. ( https://review.coreboot.org/c/coreboot/+/84298?usp=email )

Change subject: soc/mediatek/common: Reduce eMMC clock frequency to 400 kHz
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Patch Set 12: Code-Review+2

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84298/comment/cb769998_d22a5aec?usp... :
PS12, Line 14: measure eMMC clock ok
please also measure the boot time.

File src/soc/mediatek/common/msdc.c:

https://review.coreboot.org/c/coreboot/+/84298/comment/b4ef30b6_156bddb0?usp... :
PS9, Line 432: 	host->src_hz = 400 * 1000 * 1000;
> When we need to set a clock output frequency, we actually set a frequency division value. […]

Do you mean `50 * 1000 * 1000` is a wrong reference value because the actual source clock is running at `400MHz`?

So we should set `host->src_hz` to `400 * 1000 * 1000` in order to compute correct devision number ?

File src/soc/mediatek/common/msdc.c:

https://review.coreboot.org/c/coreboot/+/84298/comment/328be697_963955ae?usp... :
PS12, Line 353: msdc_debug("sclk: %d\n", sclk);
can you attach this log to the commit message ? (before and after the patch)