Attention is currently required from: Michał Żygowski, Piotr Król.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67940 )
Change subject: mb/protectli/vault_cml: Add Comet Lake 6 port board support ......................................................................
Patch Set 11:
(1 comment)
File src/mainboard/protectli/vault_cml/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/67940/comment/f4b084a2_083b17bc PS7, Line 287: device pci 1f.1 on end # P2SB : device pci 1f.2 on end # Power Management Controller
Many boards keep it enabled. […]
There are some hardware differences between Sunrise/Union Point (SPT is 100 series PCHs, UPT is 200 series PCHs and some rebranded 300 series PCHs supported by AmberLakeFspBinPkg) and Cannon/Comet Point (CNP is most 300 series PCHs, CMP is 400 series PCHs), mainly regarding the PMC and P2SB.
In SPT/UPT PCHs (supported by soc/intel/skylake), the P2SB and PMC can be discovered and behave like PCI devices. However, starting with CNP/CMP PCHs (supported by soc/intel/cannonlake) the P2SB and PMC no longer behave like regular PCI devices, and need some special handling. The PMC is not discoverable, and needs to be marked as "hidden" so that coreboot can properly initialize it. Others should be able to explain it better.