Nico Huber has uploaded this change for review. ( https://review.coreboot.org/21588
Change subject: [NEEDSTEST] soc/intel/skylake: Generate ACPI DMAR table ......................................................................
[NEEDSTEST] soc/intel/skylake: Generate ACPI DMAR table
Change-Id: I8176401dd19aee7ad09a8a145b7a3801fe5b2ae1 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/include/soc/acpi.h M src/soc/intel/skylake/include/soc/p2sb.h 4 files changed, 76 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/21588/1
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index cfb98cd..9ebf5fa 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -31,12 +31,14 @@ #include <cpu/intel/turbo.h> #include <ec/google/chromeec/ec.h> #include <intelblocks/cpulib.h> +#include <intelblocks/systemagent.h> #include <soc/intel/common/acpi.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/iomap.h> #include <soc/lpc.h> #include <soc/msr.h> +#include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/ramstage.h> @@ -534,6 +536,73 @@ } }
+static unsigned long acpi_fill_dmar(unsigned long current) +{ + struct device *const igfx_dev = dev_find_slot(0, SA_DEVFN_IGD); + const u32 gfx_vtbar = MCHBAR32(0x5400) & ~0xfff; + + /* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */ + if (igfx_dev && igfx_dev->enabled && gfx_vtbar && !MCHBAR32(0x5404)) { + const unsigned long tmp = current; + + current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar); + current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0); + current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 1); + + acpi_dmar_drhd_fixup(tmp, current); + } + + struct device *const p2sb_dev = dev_find_slot(0, PCH_DEVFN_P2SB); + const u32 vtvc0bar = MCHBAR32(0x5410) & ~0xfff; + + /* General VTBAR has to be set and in 32-bit space. */ + if (p2sb_dev && vtvc0bar && !MCHBAR32(0x5414)) { + const unsigned long tmp = current; + + /* P2SB may already be hidden. There's no clear rule, when. */ + const u8 p2sb_hidden = + pci_read_config8(p2sb_dev, PCH_P2SB_E0 + 1); + pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, 0); + + const u16 ibdf = pci_read_config16(p2sb_dev, PCH_P2SB_IBDF); + const u16 hbdf = pci_read_config16(p2sb_dev, PCH_P2SB_HBDF); + + pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, p2sb_hidden); + + current += acpi_create_dmar_drhd(current, + DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); + current += acpi_create_dmar_drhd_ds_ioapic(current, + 2, ibdf >> 8, PCI_SLOT(ibdf), PCI_FUNC(ibdf)); + current += acpi_create_dmar_drhd_ds_msi_hpet(current, + 0, hbdf >> 8, PCI_SLOT(hbdf), PCI_FUNC(hbdf)); + + acpi_dmar_drhd_fixup(tmp, current); + } + + return current; +} + +unsigned long northcluster_write_acpi_tables(struct device *const dev, + unsigned long current, + struct acpi_rsdp *const rsdp) +{ + acpi_dmar_t *const dmar = (acpi_dmar_t *)current; + struct device *const root_dev = dev_find_slot(0, SA_DEVFN_ROOT); + + /* Create DMAR table only if we have VT-d capability. */ + if (!root_dev || pci_read_config32(root_dev, 0xe4) & 1 << 23) + return current; + + printk(BIOS_DEBUG, "ACPI: * DMAR\n"); + acpi_create_dmar(dmar, DMAR_INTR_REMAP, acpi_fill_dmar); + current += dmar->header.length; + current = acpi_align_current(current); + acpi_add_table(rsdp, dmar); + current = acpi_align_current(current); + + return current; +} + unsigned long acpi_madt_irq_overrides(unsigned long current) { int sci = acpi_sci_irq(); diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 7014c24..a52c9aa 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -49,7 +49,8 @@ .scan_bus = &pci_domain_scan_bus, .ops_pci_bus = &pci_bus_default_ops, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &soc_acpi_name, + .write_acpi_tables = &northcluster_write_acpi_tables, + .acpi_name = &soc_acpi_name, #endif };
diff --git a/src/soc/intel/skylake/include/soc/acpi.h b/src/soc/intel/skylake/include/soc/acpi.h index 94c7c2f..e3da126 100644 --- a/src/soc/intel/skylake/include/soc/acpi.h +++ b/src/soc/intel/skylake/include/soc/acpi.h @@ -32,5 +32,7 @@ void southcluster_inject_dsdt(device_t device); unsigned long southcluster_write_acpi_tables(device_t device, unsigned long current, struct acpi_rsdp *rsdp); +unsigned long northcluster_write_acpi_tables(struct device *, + unsigned long current, struct acpi_rsdp *);
#endif /* _SOC_ACPI_H_ */ diff --git a/src/soc/intel/skylake/include/soc/p2sb.h b/src/soc/intel/skylake/include/soc/p2sb.h index d846dfc..09e73fc 100644 --- a/src/soc/intel/skylake/include/soc/p2sb.h +++ b/src/soc/intel/skylake/include/soc/p2sb.h @@ -19,6 +19,9 @@ #define HPTC_OFFSET 0x60 #define HPTC_ADDR_ENABLE_BIT (1 << 7)
+#define PCH_P2SB_IBDF 0x6c +#define PCH_P2SB_HBDF 0x70 + #define PCH_P2SB_EPMASK0 0xB0 #define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + ((mask_number) * 4))
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Nico Huber (Code Review)