[L] Change in coreboot[main]: mb/hardkernel/odroid-h4: Add initial ODROID-H4 series support
Attention is currently required from: Alicja Michalska, David Milosevic, Felix Singer, Lean Sheng Tan.
Angel Pons has posted comments on this change by David Milosevic. ( https://review.coreboot.org/c/coreboot/+/83979?usp=email )
Change subject: mb/hardkernel/odroid-h4: Add initial ODROID-H4 series support ......................................................................
Patch Set 7:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83979/comment/916190d0_b6ac55b2?usp... : PS7, Line 9: Adds Add
https://review.coreboot.org/c/coreboot/+/83979/comment/210e7bd5_b3519a64?usp... : PS7, Line 10: 2 The board has 4 USB ports on the back, and there's more USB ports on one of the headers
File src/mainboard/hardkernel/odroid-h4/Kconfig:
https://review.coreboot.org/c/coreboot/+/83979/comment/a0be2f42_c780f957?usp... : PS7, Line 28: string Type not needed
File src/mainboard/hardkernel/odroid-h4/bootblock.c:
https://review.coreboot.org/c/coreboot/+/83979/comment/68b09ab5_6face11d?usp... : PS7, Line 13: ite_reg_write(GPIO_DEV, 0x29, 0x01); // The value matches vendor firmware : ite_reg_write(GPIO_DEV, 0x2c, 0x41); // Internal Voltage Divider for ACC3 : ite_reg_write(GPIO_DEV, 0xbc, 0xc0); // GP56, GP57 Internal pullup : ite_reg_write(GPIO_DEV, 0xbd, 0x03); // GP60, GP61 Internal pullup : ite_reg_write(GPIO_DEV, 0xc3, 0x41); // GP40, GP46 Simple I/O function Are the comments accurate? I don't have a datasheet for this Super I/O
File src/mainboard/hardkernel/odroid-h4/romstage_fsp_params.c:
https://review.coreboot.org/c/coreboot/+/83979/comment/b98654cb_963c62d0?usp... : PS7, Line 19: 0x52 This is weird, but if it works (memory is detected and all capacity is found) then it's correct. Can you check if the total memory size reported by firmware or OS matches the DDR5 module's size? I am pretty sure your board has 8 GiB of DDR5.
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Angel Pons (Code Review)