Change in coreboot[master]: device/dram/ddr2.c: Be more lax about bit7 for tRR byte in SPD

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Change subject: device/dram/ddr2.c: Be more lax about bit7 for tRR byte in SPD
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Patch Set 1: Verified+1

Build Successful

https://qa.coreboot.org/job/coreboot-gerrit/60853/ : SUCCESS

https://qa.coreboot.org/job/coreboot-checkpatch/16039/ : SUCCESS