Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[Tim Crawford (Code Review)]

Attention is currently required from:  Felix Singer, Furquan Shaikh, Paul Menzel, Rizwan Qureshi, Subrata Banik, Sridhar Siricilla, Arthur Heymans, Patrick Rudolph, Sean Rhodes, SRIDHAR SIRICILLA, Tim Wawrzynczak, Evgeny Zinoviev, Felix Held.
Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )

Change subject: soc/intel: Allow enable/disable ME via CMOS
......................................................................

Patch Set 91: Code-Review+1

(1 comment)

Patchset:

PS91: 
Tested on:

- system76/galp3-c (WHL-U, i7-8565U)
- system76/gaze15 (CML-H, i7-10750H)
- system76/gaze16 (TGL-H, i7-11800H)
- system76/oryp5 (CFL-H, i7-9750H)
- system76/oryp6 (CML-H, i7-10875H)
- system76/oryp8 (TGL-H, i7-11800H)

Switching between enabled and disabled works on all of them.

The TGL-H boards have odd behavior when doing Disable -> Enable. They will fail all 3 attempts and boot with IME disabled, but on the next reboot will have IME correctly enabled.