[M] Change in coreboot[main]: mb/google/brask/var/bujia: Add PsysPmax setting

[Shon Wang (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, Shon Wang, Subrata Banik.

Hello Derek Huang, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, Subrata Banik, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/83593?usp=email

to look at the new patch set (#7).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: mb/google/brask/var/bujia: Add PsysPmax setting
......................................................................

mb/google/brask/var/bujia: Add PsysPmax setting

According to the Intel OPS spec, the DC power from displayer is
12~19V@8A max. It can't set PsysPmax by unknown voltage, so get
voltage  by ec command "ectool adcread 4" then calculate PsysPmax value.

BUG=b:329037849
BRANCH=firmware-brya-14505.B
TEST= USE="fw_debug" LOCALES="en"  emerge-brask chromeos-bmpblk
intel-rplfsp intel-adlfsp coreboot chromeos-bootimage

Check adcread value by ectool adcread 4. If get 19540, PsysPmax
should be 19540 * 8000 ~= 156 W.

Check FSP debug log have the following message.
PsysPmax = 156W

Change-Id: Ic6e9c6ce9f3179c7d63c1169695fbc23188456dd
Signed-off-by: Shon 
---
M src/mainboard/google/brya/variants/bujia/Makefile.mk
A src/mainboard/google/brya/variants/bujia/include/variant/get_input_power_voltage.h
A src/mainboard/google/brya/variants/bujia/ramstage.c
3 files changed, 96 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/83593/7