Change in coreboot[master]: soc/intel/common: Add PMC Crashlog PCI driver

[Jonathan Zhang (Code Review)]

Attention is currently required from: Furquan Shaikh, Francois Toguo Fotso, Subrata Banik, Daocheng Bu, Tim Wawrzynczak, Kane Chen, Patrick Rudolph, Karthik Ramasubramanian, Tim Chu.
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57684 )

Change subject: soc/intel/common: Add PMC Crashlog PCI driver
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Patch Set 9:

(3 comments)

Patchset:

PS9: 
Thanks for the work! We are working on this feature as well, albeit for Xeon-SP processors.

File src/soc/intel/common/Kconfig.common:

https://review.coreboot.org/c/coreboot/+/57684/comment/460fc2cd_5a17fdec 
PS9, Line 40: 	  crashlog record on every boot.
Do you mean "enables the PMC crashlog driver to collect crashlog records on every reset"? If the PMC crashlog record was cleared prior to last running session, and there was no PMC crash during the last running session, there will be zero PMC crashlog records, correct? In such case, the PMC crashlog driver finds zero crashlog records, and hence BERT table is not populated with PMC crashlog record.

The reason I would like to clarify this is because OS treats BERT table as an error of previous running session, and user gets alerted to investigate. We want to avoid false alarm.

File src/soc/intel/common/block/crashlog/pmc_crashlog.c:

https://review.coreboot.org/c/coreboot/+/57684/comment/667d284d_4e6dd214 
PS9, Line 269: 
Once crashlog records are collected, should we clear the records?