Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62908 )
Change subject: mb/google/guybrush/port_descriptors: use enum values for link speed ......................................................................
mb/google/guybrush/port_descriptors: use enum values for link speed
Use GEN3 from enum dxio_link_speed_cap instead of the number 3.
TEST=Timeless build results in identical firmware image for guybrush
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I0dddc57e05ec2395ca980bb63320bb9ee5242c29 --- M src/mainboard/google/guybrush/port_descriptors.c 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/62908/1
diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c index 158a802..040298b 100644 --- a/src/mainboard/google/guybrush/port_descriptors.c +++ b/src/mainboard/google/guybrush/port_descriptors.c @@ -14,7 +14,7 @@ .port_present = true, .start_logical_lane = 0, .end_logical_lane = 0, - .link_speed_capability = 3, + .link_speed_capability = GEN3, .device_number = PCI_SLOT(WLAN_DEVFN), .function_number = PCI_FUNC(WLAN_DEVFN), .link_aspm = ASPM_L1, @@ -29,7 +29,7 @@ .port_present = true, .start_logical_lane = 1, .end_logical_lane = 1, - .link_speed_capability = 3, + .link_speed_capability = GEN3, .device_number = PCI_SLOT(SD_DEVFN), .function_number = PCI_FUNC(SD_DEVFN), .link_aspm = ASPM_L1, @@ -45,7 +45,7 @@ .port_present = true, .start_logical_lane = 2, .end_logical_lane = 2, - .link_speed_capability = 3, + .link_speed_capability = GEN3, .device_number = PCI_SLOT(WWAN_DEVFN), .function_number = PCI_FUNC(WWAN_DEVFN), .link_aspm = ASPM_L1, @@ -60,7 +60,7 @@ .port_present = true, .start_logical_lane = 4, .end_logical_lane = 7, - .link_speed_capability = 3, + .link_speed_capability = GEN3, .device_number = PCI_SLOT(NVME_DEVFN), .function_number = PCI_FUNC(NVME_DEVFN), .link_aspm = ASPM_L1,