Patch set updated for coreboot: c8a4380 gpio: Extend common GPIO header, simplify function names
Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9400
-gerrit
commit c8a43808bbe2846505622501206c4aa2e8cae055 Author: Julius Werner jwerner@chromium.org Date: Wed Sep 24 15:40:49 2014 -0700
gpio: Extend common GPIO header, simplify function names
We've had gpiolib.h which defines a few common GPIO access functions for a while, but it wasn't really complete. This patch adds the missing gpio_output() function, and also renames the unwieldy gpio_get_in_value() and gpio_set_out_value() to the much easier to handle gpio_get() and gpio_set(). The header is renamed to the simpler gpio.h while we're at it (there was never really anything "lib" about it, and it was presumably just chosen due to the IPQ806x include/ conflict problem that is now resolved).
It also moves the definition of gpio_t into SoC-specific code, so that different implementations are free to encode their platform-specific GPIO parameters in those 4 bytes in the most convenient way (such as the rk3288 with a bitfield struct). Every SoC intending to use this common API should supply a <soc/gpio.h> that typedefs gpio_t to a type at most 4 bytes in length. Files accessing the API only need to include <gpio.h> which may pull in additional things (like a gpio_t creation macro) from <soc/gpio.h> on its own.
For now the API is still only used on non-x86 SoCs. Whether it makes sense to expand it to x86 as well should be separately evaluated at a later point (by someone who understands those systems better). Also, Exynos retains its old, incompatible GPIO API even though it would be a prime candidate, because it's currently just not worth the effort.
BUG=None TEST=Compiled on Daisy, Peach_Pit, Nyan_Blaze, Rush_Ryu, Storm and Veyron_Pinky.
Change-Id: Ieee77373c2bd13d07ece26fa7f8b08be324842fe Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 9e04902ada56b929e3829f2c3b4aeb618682096e Original-Change-Id: I6c1e7d1e154d9b02288aabedb397e21e1aadfa15 Original-Signed-off-by: Julius Werner jwerner@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/220975 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org --- src/include/gpio.h | 52 +++++++++++++++++++++++ src/include/gpiolib.h | 51 ---------------------- src/lib/tristate_gpios.c | 8 ++-- src/mainboard/google/nyan/boardid.c | 10 ++--- src/mainboard/google/nyan/bootblock.c | 2 +- src/mainboard/google/nyan/chromeos.c | 10 ++--- src/mainboard/google/nyan/early_configs.c | 2 +- src/mainboard/google/nyan/mainboard.c | 2 +- src/mainboard/google/nyan/reset.c | 2 +- src/mainboard/google/nyan_big/boardid.c | 4 +- src/mainboard/google/nyan_big/bootblock.c | 2 +- src/mainboard/google/nyan_big/chromeos.c | 10 ++--- src/mainboard/google/nyan_big/early_configs.c | 2 +- src/mainboard/google/nyan_big/mainboard.c | 2 +- src/mainboard/google/nyan_big/reset.c | 2 +- src/mainboard/google/nyan_blaze/boardid.c | 4 +- src/mainboard/google/nyan_blaze/bootblock.c | 2 +- src/mainboard/google/nyan_blaze/chromeos.c | 10 ++--- src/mainboard/google/nyan_blaze/early_configs.c | 2 +- src/mainboard/google/nyan_blaze/mainboard.c | 2 +- src/mainboard/google/nyan_blaze/reset.c | 2 +- src/mainboard/google/rush/boardid.c | 10 ++--- src/mainboard/google/rush/chromeos.c | 6 +-- src/mainboard/google/rush/reset.c | 2 +- src/mainboard/google/rush_ryu/boardid.c | 4 +- src/mainboard/google/rush_ryu/chromeos.c | 6 +-- src/mainboard/google/rush_ryu/gpio.h | 2 +- src/mainboard/google/rush_ryu/romstage.c | 2 +- src/mainboard/google/storm/boardid.c | 9 ++-- src/mainboard/google/storm/cdp.c | 2 +- src/mainboard/google/storm/mainboard.c | 13 +++--- src/mainboard/google/veyron_pinky/board.h | 2 +- src/mainboard/google/veyron_pinky/boardid.c | 4 +- src/mainboard/google/veyron_pinky/chromeos.c | 12 +++--- src/mainboard/google/veyron_pinky/mainboard.c | 6 +-- src/mainboard/google/veyron_pinky/reset.c | 2 +- src/mainboard/google/veyron_pinky/sdram_configs.c | 10 ++--- src/soc/nvidia/tegra/gpio.c | 23 +++++++--- src/soc/nvidia/tegra/gpio.h | 20 ++------- src/soc/nvidia/tegra/software_i2c.c | 6 +-- src/soc/nvidia/tegra124/chip.h | 2 +- src/soc/qualcomm/ipq806x/gpio.c | 6 +-- src/soc/qualcomm/ipq806x/include/soc/gpio.h | 4 +- src/soc/qualcomm/ipq806x/spi.c | 2 +- src/soc/qualcomm/ipq806x/uart.c | 2 +- src/soc/rockchip/rk3288/gpio.c | 6 +-- src/soc/rockchip/rk3288/include/soc/gpio.h | 8 +--- src/soc/rockchip/rk3288/soc.c | 2 +- src/soc/samsung/exynos5250/include/soc/gpio.h | 2 + src/soc/samsung/exynos5420/include/soc/gpio.h | 2 + 50 files changed, 177 insertions(+), 183 deletions(-)
diff --git a/src/include/gpio.h b/src/include/gpio.h new file mode 100644 index 0000000..af06697 --- /dev/null +++ b/src/include/gpio.h @@ -0,0 +1,52 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SRC_INCLUDE_GPIO_H__ +#define __SRC_INCLUDE_GPIO_H__ + +#include <soc/gpio.h> +#include <types.h> + +/* <soc/gpio.h> must typedef a gpio_t that fits in 32 bits. */ +_Static_assert(sizeof(gpio_t) <= sizeof(u32), "gpio_t doesn't fit in lb_gpio"); + +/* The following functions must be implemented by SoC/board code. */ +int gpio_get(gpio_t gpio); +void gpio_set(gpio_t gpio, int value); +void gpio_input_pulldown(gpio_t gpio); +void gpio_input_pullup(gpio_t gpio); +void gpio_input(gpio_t gpio); +void gpio_output(gpio_t gpio, int value); + +/* + * Read the value presented by the set of GPIOs, when each pin is interpreted + * as a number in 0..2 range depending on the external pullup situation. + * + * Depending on the third parameter, the return value is either a set of two + * bit fields, each representing one GPIO value, or a number where each GPIO is + * included multiplied by 3^gpio_num, resulting in a true tertiary value. + * + * gpio[]: pin positions to read. little-endian (less significant value first). + * num_gpio: number of pins to read. + * tertiary: 1: pins are interpreted as a quad coded tertiary. + * 0: pins are interpreted as a set of two bit fields. + */ +int gpio_get_tristates(gpio_t gpio[], int num_gpio, int tertiary); + +#endif /* __SRC_INCLUDE_GPIO_H__ */ diff --git a/src/include/gpiolib.h b/src/include/gpiolib.h deleted file mode 100644 index 436f26a..0000000 --- a/src/include/gpiolib.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __SRC_INCLUDE_GPIOLIB_H__ -#define __SRC_INCLUDE_GPIOLIB_H__ - -/* A generic type, use accessor macros to actually access the hardware. */ -typedef unsigned gpio_t; - -/* - * Read the value presented by the set of GPIOs, when each pin is interpreted - * as a number in 0..2 range depending on the external pullup situation. - * - * Depending on the third parameter, the return value is either a set of two - * bit fields, each representing one GPIO value, or a number where each GPIO is - * included multiplied by 3^gpio_num, resulting in a true tertiary value. - * - * gpio[]: pin positions to read. little-endian (less significant value first). - * num_gpio: number of pins to read. - * tertiary: 1: pins are interpreted as a quad coded tertiary. - * 0: pins are interpreted as a set of two bit fields. - */ -int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int tertiary); - -/* - * The following functions are not provided by the common library, but must be - * implemented by the appropriate SOC/board instead. - */ -int gpio_get_in_value(gpio_t gpio); -void gpio_set_out_value(gpio_t gpio, int value); -void gpio_input_pulldown(gpio_t gpio); -void gpio_input_pullup(gpio_t gpio); -void gpio_input(gpio_t gpio); - -#endif diff --git a/src/lib/tristate_gpios.c b/src/lib/tristate_gpios.c index 8e93e37..5ee5580 100644 --- a/src/lib/tristate_gpios.c +++ b/src/lib/tristate_gpios.c @@ -18,9 +18,9 @@ */
#include <delay.h> -#include <gpiolib.h> +#include <gpio.h>
-int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int tertiary) +int gpio_get_tristates(gpio_t gpio[], int num_gpio, int tertiary) { /* * GPIOs which are tied to stronger external pull up or pull down @@ -45,7 +45,7 @@ int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int tertiary)
/* Get gpio values at internal pull up */ for (index = 0; index < num_gpio; ++index) - value[index] = gpio_get_in_value(gpio[index]); + value[index] = gpio_get(gpio[index]);
/* Enable internal pull down */ for (index = 0; index < num_gpio; ++index) @@ -67,7 +67,7 @@ int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int tertiary) id *= 3; else id <<= 2; - temp = gpio_get_in_value(gpio[index]); + temp = gpio_get(gpio[index]); id += ((value[index] ^ temp) << 1) | temp; }
diff --git a/src/mainboard/google/nyan/boardid.c b/src/mainboard/google/nyan/boardid.c index 4628cb6..85a55fc 100644 --- a/src/mainboard/google/nyan/boardid.c +++ b/src/mainboard/google/nyan/boardid.c @@ -19,17 +19,17 @@
#include <boardid.h> #include <console/console.h> -#include <soc/gpio.h> +#include <gpio.h>
uint8_t board_id(void) { static int id = -1;
if (id < 0) { - id = gpio_get_in_value(GPIO(Q3)) << 0 | - gpio_get_in_value(GPIO(T1)) << 1 | - gpio_get_in_value(GPIO(X1)) << 2 | - gpio_get_in_value(GPIO(X4)) << 3; + id = gpio_get(GPIO(Q3)) << 0 | + gpio_get(GPIO(T1)) << 1 | + gpio_get(GPIO(X1)) << 2 | + gpio_get(GPIO(X4)) << 3; printk(BIOS_SPEW, "Board ID: %#x.\n", id); }
diff --git a/src/mainboard/google/nyan/bootblock.c b/src/mainboard/google/nyan/bootblock.c index 1f23d43..bc3cd3e 100644 --- a/src/mainboard/google/nyan/bootblock.c +++ b/src/mainboard/google/nyan/bootblock.c @@ -21,10 +21,10 @@ #include <bootblock_common.h> #include <console/console.h> #include <device/i2c.h> +#include <gpio.h> #include <soc/addressmap.h> #include <soc/clk_rst.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/pinmux.h> #include <soc/spi.h> /* FIXME: move back to soc code? */ diff --git a/src/mainboard/google/nyan/chromeos.c b/src/mainboard/google/nyan/chromeos.c index 1210f75..91a3f13 100644 --- a/src/mainboard/google/nyan/chromeos.c +++ b/src/mainboard/google/nyan/chromeos.c @@ -22,7 +22,7 @@ #include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> -#include <soc/gpio.h> +#include <gpio.h> #include <string.h> #include <vendorcode/google/chromeos/chromeos.h>
@@ -33,7 +33,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: active low */ gpios->gpios[count].port = GPIO_R1_INDEX; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(GPIO(R1)); + gpios->gpios[count].value = gpio_get(GPIO(R1)); strncpy((char *)gpios->gpios[count].name, "write protect", GPIO_MAX_NAME_LENGTH); count++; @@ -49,14 +49,14 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Lid: active high */ gpios->gpios[count].port = GPIO_R4_INDEX; gpios->gpios[count].polarity = ACTIVE_HIGH; - gpios->gpios[count].value = gpio_get_in_value(GPIO(R4)); + gpios->gpios[count].value = gpio_get(GPIO(R4)); strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH); count++;
/* Power: active low */ gpios->gpios[count].port = GPIO_Q0_INDEX; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(GPIO(Q0)); + gpios->gpios[count].value = gpio_get(GPIO(Q0)); strncpy((char *)gpios->gpios[count].name, "power", GPIO_MAX_NAME_LENGTH); count++; @@ -91,5 +91,5 @@ int get_recovery_mode_switch(void)
int get_write_protect_state(void) { - return !gpio_get_in_value(GPIO(R1)); + return !gpio_get(GPIO(R1)); } diff --git a/src/mainboard/google/nyan/early_configs.c b/src/mainboard/google/nyan/early_configs.c index 046e2bd..de9fe8e 100644 --- a/src/mainboard/google/nyan/early_configs.c +++ b/src/mainboard/google/nyan/early_configs.c @@ -17,10 +17,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
+#include <gpio.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/early_configs.h> -#include <soc/gpio.h> #include <soc/nvidia/tegra/i2c.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; diff --git a/src/mainboard/google/nyan/mainboard.c b/src/mainboard/google/nyan/mainboard.c index f4aa93a..dce4cbc 100644 --- a/src/mainboard/google/nyan/mainboard.c +++ b/src/mainboard/google/nyan/mainboard.c @@ -21,10 +21,10 @@ #include <device/device.h> #include <elog.h> #include <boot/coreboot_tables.h> +#include <gpio.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/clk_rst.h> -#include <soc/gpio.h> #include <soc/mc.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/nvidia/tegra/usb.h> diff --git a/src/mainboard/google/nyan/reset.c b/src/mainboard/google/nyan/reset.c index de096c6..e58890e 100644 --- a/src/mainboard/google/nyan/reset.c +++ b/src/mainboard/google/nyan/reset.c @@ -18,7 +18,7 @@ */
#include <arch/io.h> -#include <soc/gpio.h> +#include <gpio.h> #include <reset.h>
void hard_reset(void) diff --git a/src/mainboard/google/nyan_big/boardid.c b/src/mainboard/google/nyan_big/boardid.c index 335da87..00f646d 100644 --- a/src/mainboard/google/nyan_big/boardid.c +++ b/src/mainboard/google/nyan_big/boardid.c @@ -19,7 +19,7 @@
#include <boardid.h> #include <console/console.h> -#include <soc/gpio.h> +#include <gpio.h> #include <stdlib.h>
uint8_t board_id(void) @@ -29,7 +29,7 @@ uint8_t board_id(void) if (id < 0) { gpio_t gpio[] = {GPIO(Q3), GPIO(T1), GPIO(X1), GPIO(X4)};
- id = gpio_get_in_tristate_values(gpio, ARRAY_SIZE(gpio), 0); + id = gpio_get_tristates(gpio, ARRAY_SIZE(gpio), 0);
printk(BIOS_SPEW, "Board TRISTATE ID: %#x.\n", id); } diff --git a/src/mainboard/google/nyan_big/bootblock.c b/src/mainboard/google/nyan_big/bootblock.c index b24862e..c471cb8 100644 --- a/src/mainboard/google/nyan_big/bootblock.c +++ b/src/mainboard/google/nyan_big/bootblock.c @@ -21,10 +21,10 @@ #include <bootblock_common.h> #include <console/console.h> #include <device/i2c.h> +#include <gpio.h> #include <soc/addressmap.h> #include <soc/clk_rst.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/pinmux.h> #include <soc/spi.h> /* FIXME: move back to soc code? */ diff --git a/src/mainboard/google/nyan_big/chromeos.c b/src/mainboard/google/nyan_big/chromeos.c index 28da053..7073198 100644 --- a/src/mainboard/google/nyan_big/chromeos.c +++ b/src/mainboard/google/nyan_big/chromeos.c @@ -22,7 +22,7 @@ #include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> -#include <soc/gpio.h> +#include <gpio.h> #include <string.h> #include <vendorcode/google/chromeos/chromeos.h>
@@ -33,7 +33,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: active low */ gpios->gpios[count].port = GPIO_R1_INDEX; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(GPIO(R1)); + gpios->gpios[count].value = gpio_get(GPIO(R1)); strncpy((char *)gpios->gpios[count].name, "write protect", GPIO_MAX_NAME_LENGTH); count++; @@ -49,14 +49,14 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Lid: active high */ gpios->gpios[count].port = GPIO_R4_INDEX; gpios->gpios[count].polarity = ACTIVE_HIGH; - gpios->gpios[count].value = gpio_get_in_value(GPIO(R4)); + gpios->gpios[count].value = gpio_get(GPIO(R4)); strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH); count++;
/* Power: active low */ gpios->gpios[count].port = GPIO_Q0_INDEX; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(GPIO(Q0)); + gpios->gpios[count].value = gpio_get(GPIO(Q0)); strncpy((char *)gpios->gpios[count].name, "power", GPIO_MAX_NAME_LENGTH); count++; @@ -91,5 +91,5 @@ int get_recovery_mode_switch(void)
int get_write_protect_state(void) { - return !gpio_get_in_value(GPIO(R1)); + return !gpio_get(GPIO(R1)); } diff --git a/src/mainboard/google/nyan_big/early_configs.c b/src/mainboard/google/nyan_big/early_configs.c index 046e2bd..de9fe8e 100644 --- a/src/mainboard/google/nyan_big/early_configs.c +++ b/src/mainboard/google/nyan_big/early_configs.c @@ -17,10 +17,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
+#include <gpio.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/early_configs.h> -#include <soc/gpio.h> #include <soc/nvidia/tegra/i2c.h>
static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; diff --git a/src/mainboard/google/nyan_big/mainboard.c b/src/mainboard/google/nyan_big/mainboard.c index 63d9d5c..712269a 100644 --- a/src/mainboard/google/nyan_big/mainboard.c +++ b/src/mainboard/google/nyan_big/mainboard.c @@ -21,10 +21,10 @@ #include <boot/coreboot_tables.h> #include <device/device.h> #include <elog.h> +#include <gpio.h> #include <soc/addressmap.h> #include <soc/clk_rst.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/mc.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/pmc.h> diff --git a/src/mainboard/google/nyan_big/reset.c b/src/mainboard/google/nyan_big/reset.c index de096c6..e58890e 100644 --- a/src/mainboard/google/nyan_big/reset.c +++ b/src/mainboard/google/nyan_big/reset.c @@ -18,7 +18,7 @@ */
#include <arch/io.h> -#include <soc/gpio.h> +#include <gpio.h> #include <reset.h>
void hard_reset(void) diff --git a/src/mainboard/google/nyan_blaze/boardid.c b/src/mainboard/google/nyan_blaze/boardid.c index 335da87..00f646d 100644 --- a/src/mainboard/google/nyan_blaze/boardid.c +++ b/src/mainboard/google/nyan_blaze/boardid.c @@ -19,7 +19,7 @@
#include <boardid.h> #include <console/console.h> -#include <soc/gpio.h> +#include <gpio.h> #include <stdlib.h>
uint8_t board_id(void) @@ -29,7 +29,7 @@ uint8_t board_id(void) if (id < 0) { gpio_t gpio[] = {GPIO(Q3), GPIO(T1), GPIO(X1), GPIO(X4)};
- id = gpio_get_in_tristate_values(gpio, ARRAY_SIZE(gpio), 0); + id = gpio_get_tristates(gpio, ARRAY_SIZE(gpio), 0);
printk(BIOS_SPEW, "Board TRISTATE ID: %#x.\n", id); } diff --git a/src/mainboard/google/nyan_blaze/bootblock.c b/src/mainboard/google/nyan_blaze/bootblock.c index b24862e..c471cb8 100644 --- a/src/mainboard/google/nyan_blaze/bootblock.c +++ b/src/mainboard/google/nyan_blaze/bootblock.c @@ -21,10 +21,10 @@ #include <bootblock_common.h> #include <console/console.h> #include <device/i2c.h> +#include <gpio.h> #include <soc/addressmap.h> #include <soc/clk_rst.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/pinmux.h> #include <soc/spi.h> /* FIXME: move back to soc code? */ diff --git a/src/mainboard/google/nyan_blaze/chromeos.c b/src/mainboard/google/nyan_blaze/chromeos.c index 0b944d1..7718849 100644 --- a/src/mainboard/google/nyan_blaze/chromeos.c +++ b/src/mainboard/google/nyan_blaze/chromeos.c @@ -21,7 +21,7 @@ #include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> -#include <soc/gpio.h> +#include <gpio.h> #include <string.h> #include <vendorcode/google/chromeos/chromeos.h>
@@ -37,7 +37,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: active low */ gpios->gpios[count].port = GPIO_R1_INDEX; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(GPIO(R1)); + gpios->gpios[count].value = gpio_get(GPIO(R1)); strncpy((char *)gpios->gpios[count].name, "write protect", GPIO_MAX_NAME_LENGTH); count++; @@ -53,14 +53,14 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Lid: active high */ gpios->gpios[count].port = GPIO_R4_INDEX; gpios->gpios[count].polarity = ACTIVE_HIGH; - gpios->gpios[count].value = gpio_get_in_value(GPIO(R4)); + gpios->gpios[count].value = gpio_get(GPIO(R4)); strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH); count++;
/* Power: active low */ gpios->gpios[count].port = GPIO_Q0_INDEX; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(GPIO(Q0)); + gpios->gpios[count].value = gpio_get(GPIO(Q0)); strncpy((char *)gpios->gpios[count].name, "power", GPIO_MAX_NAME_LENGTH); count++; @@ -95,5 +95,5 @@ int get_recovery_mode_switch(void)
int get_write_protect_state(void) { - return !gpio_get_in_value(GPIO(R1)); + return !gpio_get(GPIO(R1)); } diff --git a/src/mainboard/google/nyan_blaze/early_configs.c b/src/mainboard/google/nyan_blaze/early_configs.c index 020f3fd..de9fe8e 100644 --- a/src/mainboard/google/nyan_blaze/early_configs.c +++ b/src/mainboard/google/nyan_blaze/early_configs.c @@ -17,9 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
+#include <gpio.h> #include <soc/addressmap.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/early_configs.h> #include <soc/nvidia/tegra/i2c.h>
diff --git a/src/mainboard/google/nyan_blaze/mainboard.c b/src/mainboard/google/nyan_blaze/mainboard.c index da49377..9daa2bb 100644 --- a/src/mainboard/google/nyan_blaze/mainboard.c +++ b/src/mainboard/google/nyan_blaze/mainboard.c @@ -21,10 +21,10 @@ #include <boot/coreboot_tables.h> #include <device/device.h> #include <elog.h> +#include <gpio.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/clk_rst.h> -#include <soc/gpio.h> #include <soc/mc.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/nvidia/tegra/usb.h> diff --git a/src/mainboard/google/nyan_blaze/reset.c b/src/mainboard/google/nyan_blaze/reset.c index de096c6..e58890e 100644 --- a/src/mainboard/google/nyan_blaze/reset.c +++ b/src/mainboard/google/nyan_blaze/reset.c @@ -18,7 +18,7 @@ */
#include <arch/io.h> -#include <soc/gpio.h> +#include <gpio.h> #include <reset.h>
void hard_reset(void) diff --git a/src/mainboard/google/rush/boardid.c b/src/mainboard/google/rush/boardid.c index 7ed2b53..0c9d2c5 100644 --- a/src/mainboard/google/rush/boardid.c +++ b/src/mainboard/google/rush/boardid.c @@ -19,17 +19,17 @@
#include <boardid.h> #include <console/console.h> -#include <soc/gpio.h> +#include <gpio.h>
uint8_t board_id(void) { static int id = -1;
if (id < 0) { - id = gpio_get_in_value(GPIO(Q3)) << 0 | - gpio_get_in_value(GPIO(T1)) << 1 | - gpio_get_in_value(GPIO(X1)) << 2 | - gpio_get_in_value(GPIO(X4)) << 3; + id = gpio_get(GPIO(Q3)) << 0 | + gpio_get(GPIO(T1)) << 1 | + gpio_get(GPIO(X1)) << 2 | + gpio_get(GPIO(X4)) << 3; printk(BIOS_SPEW, "Board ID: %#x.\n", id); }
diff --git a/src/mainboard/google/rush/chromeos.c b/src/mainboard/google/rush/chromeos.c index 5232344..1a017f5 100644 --- a/src/mainboard/google/rush/chromeos.c +++ b/src/mainboard/google/rush/chromeos.c @@ -21,7 +21,7 @@ #include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> -#include <soc/gpio.h> +#include <gpio.h> #include <string.h> #include <vendorcode/google/chromeos/chromeos.h>
@@ -32,7 +32,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: active low */ gpios->gpios[count].port = GPIO_R1_INDEX; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(GPIO(R1)); + gpios->gpios[count].value = gpio_get(GPIO(R1)); strncpy((char *)gpios->gpios[count].name, "write protect", GPIO_MAX_NAME_LENGTH); count++; @@ -90,5 +90,5 @@ int get_recovery_mode_switch(void)
int get_write_protect_state(void) { - return !gpio_get_in_value(GPIO(R1)); + return !gpio_get(GPIO(R1)); } diff --git a/src/mainboard/google/rush/reset.c b/src/mainboard/google/rush/reset.c index dbaed0d..0fc6320 100644 --- a/src/mainboard/google/rush/reset.c +++ b/src/mainboard/google/rush/reset.c @@ -18,7 +18,7 @@ */
#include <arch/io.h> -#include <soc/gpio.h> +#include <gpio.h> #include <reset.h>
void hard_reset(void) diff --git a/src/mainboard/google/rush_ryu/boardid.c b/src/mainboard/google/rush_ryu/boardid.c index 9d99b90..ba3a4be 100644 --- a/src/mainboard/google/rush_ryu/boardid.c +++ b/src/mainboard/google/rush_ryu/boardid.c @@ -19,7 +19,6 @@
#include <boardid.h> #include <console/console.h> -#include <soc/gpio.h> #include <stdlib.h>
#include "gpio.h" @@ -75,8 +74,7 @@ uint8_t board_id(void) int tristate_id; gpio_t gpio[] = { BD_ID0, BD_ID1 };
- tristate_id = gpio_get_in_tristate_values(gpio, - ARRAY_SIZE(gpio), 0); + tristate_id = gpio_get_tristates(gpio, ARRAY_SIZE(gpio), 0);
for (i = 0; i < ARRAY_SIZE(bdid_map); i++) { if (tristate_id != bdid_map[i].tri_state_value) diff --git a/src/mainboard/google/rush_ryu/chromeos.c b/src/mainboard/google/rush_ryu/chromeos.c index 521fe59..f752aee 100644 --- a/src/mainboard/google/rush_ryu/chromeos.c +++ b/src/mainboard/google/rush_ryu/chromeos.c @@ -33,7 +33,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: active low */ gpios->gpios[count].port = WRITE_PROTECT_L_INDEX; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(WRITE_PROTECT_L); + gpios->gpios[count].value = gpio_get(WRITE_PROTECT_L); strncpy((char *)gpios->gpios[count].name, "write protect", GPIO_MAX_NAME_LENGTH); count++; @@ -51,7 +51,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Power: active low */ gpios->gpios[count].port = POWER_BUTTON_INDEX, gpios->gpios[count].polarity = ACTIVE_HIGH; - gpios->gpios[count].value = gpio_get_in_value(POWER_BUTTON); + gpios->gpios[count].value = gpio_get(POWER_BUTTON); strncpy((char *)gpios->gpios[count].name, "power", GPIO_MAX_NAME_LENGTH); count++; @@ -86,5 +86,5 @@ int get_recovery_mode_switch(void)
int get_write_protect_state(void) { - return !gpio_get_in_value(WRITE_PROTECT_L); + return !gpio_get(WRITE_PROTECT_L); } diff --git a/src/mainboard/google/rush_ryu/gpio.h b/src/mainboard/google/rush_ryu/gpio.h index 9c67420..2792ec3 100644 --- a/src/mainboard/google/rush_ryu/gpio.h +++ b/src/mainboard/google/rush_ryu/gpio.h @@ -20,7 +20,7 @@ #ifndef __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__ #define __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
-#include <soc/gpio.h> +#include <gpio.h>
/* Board ID definitions. */ enum { diff --git a/src/mainboard/google/rush_ryu/romstage.c b/src/mainboard/google/rush_ryu/romstage.c index 41c9149..fc2379f 100644 --- a/src/mainboard/google/rush_ryu/romstage.c +++ b/src/mainboard/google/rush_ryu/romstage.c @@ -69,7 +69,7 @@ static void lte_modem_init(void) int mdm_det;
/* A LTE modem is present if MDM_DET is pulled down by the modem */ - mdm_det = gpio_get_in_value(MDM_DET); + mdm_det = gpio_get(MDM_DET); if (mdm_det == 1) return;
diff --git a/src/mainboard/google/storm/boardid.c b/src/mainboard/google/storm/boardid.c index a8dd844..878598b 100644 --- a/src/mainboard/google/storm/boardid.c +++ b/src/mainboard/google/storm/boardid.c @@ -18,15 +18,15 @@ */
#include <boardid.h> -#include <gpiolib.h> +#include <gpio.h> #include <console/console.h> #include <stdlib.h>
/* * Storm boards dedicate to the board ID three GPIOs in tertiary mode: 29, 30 * and 68. On proto0 GPIO68 is used and tied low, so it reads as 'zero' by - * gpio_get_in_tristate_values(), whereas the other two pins are not connected - * and read as 'two'. This results in gpio_get_in_tristate_values() returning + * gpio_get_tristates(), whereas the other two pins are not connected + * and read as 'two'. This results in gpio_get_tristates() returning * 8 on proto0. * * Three tertitiary signals could represent 27 different values. To make @@ -45,8 +45,7 @@ static uint8_t get_board_id(void) gpio_t hw_rev_gpios[] = {29, 30, 68}; int offset = 19;
- bid = gpio_get_in_tristate_values(hw_rev_gpios, - ARRAY_SIZE(hw_rev_gpios), 1); + bid = gpio_get_tristates(hw_rev_gpios, ARRAY_SIZE(hw_rev_gpios), 1); bid = (bid + offset) % 27; printk(BIOS_INFO, "Board ID %d\n", bid);
diff --git a/src/mainboard/google/storm/cdp.c b/src/mainboard/google/storm/cdp.c index 7e1aeb6..78edb26 100644 --- a/src/mainboard/google/storm/cdp.c +++ b/src/mainboard/google/storm/cdp.c @@ -1,7 +1,7 @@
/* * Copyright (c) 2012 - 2013 The Linux Foundation. All rights reserved.* */
-#include <soc/gpio.h> +#include <gpio.h> #include <soc/cdp.h> #include <types.h>
diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c index 552f968..59e7ce7 100644 --- a/src/mainboard/google/storm/mainboard.c +++ b/src/mainboard/google/storm/mainboard.c @@ -23,9 +23,8 @@ #include <console/console.h> #include <delay.h> #include <device/device.h> -#include <gpiolib.h> +#include <gpio.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/usb.h> #include <string.h> #include <symbols.h> @@ -46,7 +45,7 @@ static void setup_usb(void) #if !CONFIG_BOARD_VARIANT_AP148 gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE); - gpio_set_out_value(USB_ENABLE_GPIO, 1); + gpio_set(USB_ENABLE_GPIO, 1); #endif usb_clock_config();
@@ -86,9 +85,9 @@ static void setup_tpm(void) * make it twice as long. If the output was driven low originally, the * reset pulse will be even longer. */ - gpio_set_out_value(TPM_RESET_GPIO, 0); + gpio_set(TPM_RESET_GPIO, 0); udelay(160); - gpio_set_out_value(TPM_RESET_GPIO, 1); + gpio_set(TPM_RESET_GPIO, 1); }
#define SW_RESET_GPIO 26 @@ -106,7 +105,7 @@ static void deassert_sw_reset(void) gpio_tlmm_config_set(SW_RESET_GPIO, FUNC_SEL_GPIO, GPIO_PULL_UP, GPIO_4MA, GPIO_ENABLE);
- gpio_set_out_value(SW_RESET_GPIO, 0); + gpio_set(SW_RESET_GPIO, 0); }
static void mainboard_init(device_t dev) @@ -148,7 +147,7 @@ static int read_gpio(gpio_t gpio_num) gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE, GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE); udelay(10); /* Should be enough to settle. */ - return gpio_get_in_value(gpio_num); + return gpio_get(gpio_num); }
void fill_lb_gpios(struct lb_gpios *gpios) diff --git a/src/mainboard/google/veyron_pinky/board.h b/src/mainboard/google/veyron_pinky/board.h index 8d452c8..73eb5ef 100644 --- a/src/mainboard/google/veyron_pinky/board.h +++ b/src/mainboard/google/veyron_pinky/board.h @@ -21,7 +21,7 @@ #define __MAINBOARD_GOOGLE_VEYRON_PINKY_BOARD_H
#include <boardid.h> -#include <soc/gpio.h> +#include <gpio.h>
#define PMIC_BUS 0
diff --git a/src/mainboard/google/veyron_pinky/boardid.c b/src/mainboard/google/veyron_pinky/boardid.c index 01e92a3..d8f4a3d 100644 --- a/src/mainboard/google/veyron_pinky/boardid.c +++ b/src/mainboard/google/veyron_pinky/boardid.c @@ -19,7 +19,7 @@
#include <boardid.h> #include <console/console.h> -#include <soc/gpio.h> +#include <gpio.h> #include <stdlib.h>
uint8_t board_id(void) @@ -38,7 +38,7 @@ uint8_t board_id(void) id = 0; for (i = 0; i < ARRAY_SIZE(pins); i++) { gpio_input(pins[i]); - id |= gpio_get_in_value(pins[i]) << i; + id |= gpio_get(pins[i]) << i; } printk(BIOS_SPEW, "Board ID: %#x.\n", id); } diff --git a/src/mainboard/google/veyron_pinky/chromeos.c b/src/mainboard/google/veyron_pinky/chromeos.c index 30cd277..dc224a5 100644 --- a/src/mainboard/google/veyron_pinky/chromeos.c +++ b/src/mainboard/google/veyron_pinky/chromeos.c @@ -21,7 +21,7 @@ #include <console/console.h> #include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec_commands.h> -#include <soc/gpio.h> +#include <gpio.h> #include <string.h> #include <vendorcode/google/chromeos/chromeos.h>
@@ -47,7 +47,7 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Write Protect: active low */ gpios->gpios[count].port = GPIO_WP.raw; gpios->gpios[count].polarity = ACTIVE_LOW; - gpios->gpios[count].value = gpio_get_in_value(GPIO_WP); + gpios->gpios[count].value = gpio_get(GPIO_WP); strncpy((char *)gpios->gpios[count].name, "write protect", GPIO_MAX_NAME_LENGTH); count++; @@ -63,14 +63,14 @@ void fill_lb_gpios(struct lb_gpios *gpios) /* Lid: active high */ gpios->gpios[count].port = GPIO_LID.raw; gpios->gpios[count].polarity = ACTIVE_HIGH; - gpios->gpios[count].value = gpio_get_in_value(GPIO_LID); + gpios->gpios[count].value = gpio_get(GPIO_LID); strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH); count++;
/* Power:GPIO active high */ gpios->gpios[count].port = GPIO_POWER.raw; gpios->gpios[count].polarity = ACTIVE_HIGH; - gpios->gpios[count].value = gpio_get_in_value(GPIO_POWER); + gpios->gpios[count].value = gpio_get(GPIO_POWER); strncpy((char *)gpios->gpios[count].name, "power", GPIO_MAX_NAME_LENGTH); count++; @@ -99,7 +99,7 @@ int get_recovery_mode_switch(void) uint32_t ec_events;
/* The GPIO is active low. */ - if (!gpio_get_in_value(GPIO_RECOVERY)) + if (!gpio_get(GPIO_RECOVERY)) return 1;
ec_events = google_chromeec_get_events_b(); @@ -109,6 +109,6 @@ int get_recovery_mode_switch(void)
int get_write_protect_state(void) { - return !gpio_get_in_value(GPIO_WP); + return !gpio_get(GPIO_WP); }
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c index a8cc3c3..2442472 100644 --- a/src/mainboard/google/veyron_pinky/mainboard.c +++ b/src/mainboard/google/veyron_pinky/mainboard.c @@ -19,13 +19,13 @@
#include <arch/cache.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include <console/console.h> #include <delay.h> #include <device/device.h> -#include <edid.h> -#include <boot/coreboot_tables.h> #include <device/i2c.h> -#include <soc/gpio.h> +#include <edid.h> +#include <gpio.h> #include <soc/grf.h> #include <soc/soc.h> #include <soc/pmu.h> diff --git a/src/mainboard/google/veyron_pinky/reset.c b/src/mainboard/google/veyron_pinky/reset.c index a2777f8..9cbe9c1 100644 --- a/src/mainboard/google/veyron_pinky/reset.c +++ b/src/mainboard/google/veyron_pinky/reset.c @@ -18,7 +18,7 @@ */
#include <arch/io.h> -#include <soc/gpio.h> +#include <gpio.h> #include <reset.h>
#include "board.h" diff --git a/src/mainboard/google/veyron_pinky/sdram_configs.c b/src/mainboard/google/veyron_pinky/sdram_configs.c index 1a331ce..a58c6dd 100644 --- a/src/mainboard/google/veyron_pinky/sdram_configs.c +++ b/src/mainboard/google/veyron_pinky/sdram_configs.c @@ -18,8 +18,8 @@ */ #include <arch/io.h> #include <console/console.h> +#include <gpio.h> #include <soc/sdram.h> -#include <soc/gpio.h> #include <string.h> #include <types.h>
@@ -56,10 +56,10 @@ u32 sdram_get_ram_code(void) gpio_input(GPIO_RAMCODE2); gpio_input(GPIO_RAMCODE3);
- code = gpio_get_in_value(GPIO_RAMCODE3) << 3 - | gpio_get_in_value(GPIO_RAMCODE2) << 2 - | gpio_get_in_value(GPIO_RAMCODE1) << 1 - | gpio_get_in_value(GPIO_RAMCODE0) << 0; + code = gpio_get(GPIO_RAMCODE3) << 3 + | gpio_get(GPIO_RAMCODE2) << 2 + | gpio_get(GPIO_RAMCODE1) << 1 + | gpio_get(GPIO_RAMCODE0) << 0;
return code; } diff --git a/src/soc/nvidia/tegra/gpio.c b/src/soc/nvidia/tegra/gpio.c index 9f09f24..009334f 100644 --- a/src/soc/nvidia/tegra/gpio.c +++ b/src/soc/nvidia/tegra/gpio.c @@ -19,16 +19,15 @@
#include <arch/io.h> #include <console/console.h> +#include <gpio.h> #include <soc/addressmap.h> #include <stddef.h> #include <stdint.h> #include <delay.h> -#include <gpiolib.h>
-#include "gpio.h" #include "pinmux.h"
-void __gpio_input(gpio_t gpio, u32 pull) +static void __gpio_input(gpio_t gpio, u32 pull) { u32 pinmux_config = PINMUX_INPUT_ENABLE | pull;
@@ -38,10 +37,10 @@ void __gpio_input(gpio_t gpio, u32 pull) pinmux_set_config(gpio >> GPIO_PINMUX_SHIFT, pinmux_config); }
-void __gpio_output(gpio_t gpio, int value, u32 od) +static void __gpio_output(gpio_t gpio, int value, u32 od) { gpio_set_int_enable(gpio, 0); - gpio_set_out_value(gpio, value); + gpio_set(gpio, value); gpio_set_out_enable(gpio, 1); gpio_set_mode(gpio, GPIO_MODE_GPIO); pinmux_set_config(gpio >> GPIO_PINMUX_SHIFT, PINMUX_PULL_NONE | od); @@ -121,7 +120,7 @@ int gpio_get_out_enable(gpio_t gpio) return (port & (1 << bit)) != 0; }
-void gpio_set_out_value(gpio_t gpio, int value) +void gpio_set(gpio_t gpio, int value) { int bit = gpio % GPIO_GPIOS_PER_PORT; gpio_write_port(gpio & ((1 << GPIO_PINMUX_SHIFT) - 1), @@ -137,7 +136,7 @@ int gpio_get_out_value(gpio_t gpio) return (port & (1 << bit)) != 0; }
-int gpio_get_in_value(gpio_t gpio) +int gpio_get(gpio_t gpio) { int bit = gpio % GPIO_GPIOS_PER_PORT; u32 port = gpio_read_port(gpio & ((1 << GPIO_PINMUX_SHIFT) - 1), @@ -212,3 +211,13 @@ void gpio_input(gpio_t gpio) { __gpio_input(gpio, PINMUX_PULL_NONE); } + +void gpio_output(gpio_t gpio, int value) +{ + __gpio_output(gpio, value, 0); +} + +void gpio_output_open_drain(gpio_t gpio, int value) +{ + __gpio_output(gpio, value, PINMUX_OPEN_DRAIN); +} diff --git a/src/soc/nvidia/tegra/gpio.h b/src/soc/nvidia/tegra/gpio.h index 2ad3ab3..72c7179 100644 --- a/src/soc/nvidia/tegra/gpio.h +++ b/src/soc/nvidia/tegra/gpio.h @@ -21,29 +21,15 @@ #define __SOC_NVIDIA_TEGRA_GPIO_H__
#include <stdint.h> -#include <gpiolib.h>
#include "pinmux.h"
+typedef u32 gpio_t; + #define GPIO_PINMUX_SHIFT 16 #define GPIO(name) ((gpio_t)(GPIO_##name##_INDEX | \ (PINMUX_GPIO_##name << GPIO_PINMUX_SHIFT)))
-void __gpio_output(gpio_t gpio, int value, u32 open_drain); -void __gpio_input(gpio_t gpio, u32 pull); - -/* Higher level function wrappers for common GPIO configurations. */ - -static inline void gpio_output(gpio_t gpio, int value) -{ - __gpio_output(gpio, value, 0); -} - -static inline void gpio_output_open_drain(gpio_t gpio, int value) -{ - __gpio_output(gpio, value, PINMUX_OPEN_DRAIN); -} - /* Functions to modify specific GPIO control values. */
enum gpio_mode { @@ -72,6 +58,8 @@ void gpio_get_int_level(gpio_t gpio, int *high_rise, int *edge, int *delta);
void gpio_set_int_clear(gpio_t gpio);
+void gpio_output_open_drain(gpio_t gpio, int value); + /* Hardware definitions. */
enum { diff --git a/src/soc/nvidia/tegra/software_i2c.c b/src/soc/nvidia/tegra/software_i2c.c index 35fc1af..d1172bc 100644 --- a/src/soc/nvidia/tegra/software_i2c.c +++ b/src/soc/nvidia/tegra/software_i2c.c @@ -18,7 +18,7 @@ */
#include <device/i2c.h> -#include <soc/gpio.h> +#include <gpio.h> #include <soc/pinmux.h>
#include "i2c.h" @@ -58,12 +58,12 @@ static void tegra_set_scl(unsigned bus, int high)
static int tegra_get_sda(unsigned bus) { - return gpio_get_in_value(pins[bus].sda); + return gpio_get(pins[bus].sda); }
static int tegra_get_scl(unsigned bus) { - return gpio_get_in_value(pins[bus].scl); + return gpio_get(pins[bus].scl); }
static struct software_i2c_ops tegra_ops = { diff --git a/src/soc/nvidia/tegra124/chip.h b/src/soc/nvidia/tegra124/chip.h index c3652a1..acabd37 100644 --- a/src/soc/nvidia/tegra124/chip.h +++ b/src/soc/nvidia/tegra124/chip.h @@ -20,8 +20,8 @@ #ifndef __SOC_NVIDIA_TEGRA124_CHIP_H__ #define __SOC_NVIDIA_TEGRA124_CHIP_H__ #include <arch/cache.h> +#include <gpio.h> #include <soc/addressmap.h> -#include <soc/gpio.h>
#define EFAULT 1 #define EINVAL 2 diff --git a/src/soc/qualcomm/ipq806x/gpio.c b/src/soc/qualcomm/ipq806x/gpio.c index 46dca4e..a0a3df9 100644 --- a/src/soc/qualcomm/ipq806x/gpio.c +++ b/src/soc/qualcomm/ipq806x/gpio.c @@ -29,7 +29,7 @@ */
#include <arch/io.h> -#include <soc/gpio.h> +#include <gpio.h> #include <soc/iomap.h>
/******************************************************* @@ -116,7 +116,7 @@ unsigned *out - Value of GPIO output
Return : None *******************************************************/ -int gpio_get_in_value(gpio_t gpio) +int gpio_get(gpio_t gpio) { if (gpio_not_valid(gpio)) return -1; @@ -126,7 +126,7 @@ int gpio_get_in_value(gpio_t gpio) GPIO_IO_IN_MASK; }
-void gpio_set_out_value(gpio_t gpio, int value) +void gpio_set(gpio_t gpio, int value) { if (gpio_not_valid(gpio)) return; diff --git a/src/soc/qualcomm/ipq806x/include/soc/gpio.h b/src/soc/qualcomm/ipq806x/include/soc/gpio.h index 276022c..3542991 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/gpio.h +++ b/src/soc/qualcomm/ipq806x/include/soc/gpio.h @@ -33,7 +33,7 @@ #ifndef __SOC_QUALCOMM_IPQ806X_GPIO_H_ #define __SOC_QUALCOMM_IPQ806X_GPIO_H_
-#include <gpiolib.h> +#include <types.h>
#define GPIO_FUNC_ENABLE 1 #define GPIO_FUNC_DISABLE 0 @@ -90,6 +90,8 @@ #define GPIO_IO_IN_SHIFT 0 #define GPIO_IO_OUT_SHIFT 1
+typedef u32 gpio_t; + void gpio_tlmm_config_set(gpio_t gpio, unsigned int func, unsigned int pull, unsigned int drvstr, unsigned int enable); diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c index 4cf64eb..0f72cac 100644 --- a/src/soc/qualcomm/ipq806x/spi.c +++ b/src/soc/qualcomm/ipq806x/spi.c @@ -4,7 +4,7 @@
#include <arch/io.h> #include <delay.h> -#include <soc/gpio.h> +#include <gpio.h> #include <soc/iomap.h> #include <soc/spi.h> #include <stdlib.h> diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c index 3e8e187..0a19e9a 100644 --- a/src/soc/qualcomm/ipq806x/uart.c +++ b/src/soc/qualcomm/ipq806x/uart.c @@ -36,8 +36,8 @@ #include <console/console.h> #include <console/uart.h> #include <delay.h> +#include <gpio.h> #include <soc/clock.h> -#include <soc/gpio.h> #include <soc/gsbi.h> #include <soc/ipq_uart.h> #include <stdint.h> diff --git a/src/soc/rockchip/rk3288/gpio.c b/src/soc/rockchip/rk3288/gpio.c index c3784ec..b84d6a0 100644 --- a/src/soc/rockchip/rk3288/gpio.c +++ b/src/soc/rockchip/rk3288/gpio.c @@ -19,10 +19,10 @@
#include <arch/io.h> #include <console/console.h> -#include <soc/soc.h> -#include <soc/gpio.h> +#include <gpio.h> #include <soc/grf.h> #include <soc/pmu.h> +#include <soc/soc.h> #include <stdlib.h>
struct rk3288_gpio_regs *gpio_port[] = { @@ -72,7 +72,7 @@ void gpio_input_pullup(gpio_t gpio) __gpio_input(gpio, PULLUP); }
-int gpio_get_in_value(gpio_t gpio) +int gpio_get(gpio_t gpio) { return (readl(&gpio_port[gpio.port]->ext_porta) >> gpio.num) & 0x1; } diff --git a/src/soc/rockchip/rk3288/include/soc/gpio.h b/src/soc/rockchip/rk3288/include/soc/gpio.h index c459de9..6a0055e 100644 --- a/src/soc/rockchip/rk3288/include/soc/gpio.h +++ b/src/soc/rockchip/rk3288/include/soc/gpio.h @@ -67,10 +67,4 @@ enum { GPIO_D, };
-void gpio_input(gpio_t gpio); -void gpio_input_pulldown(gpio_t gpio); -void gpio_input_pullup(gpio_t gpio); -void gpio_output(gpio_t gpio, int value); -int gpio_get_in_value(gpio_t gpio); - -#endif /* _ASM_ROCKCHIP_GPIO_H_ */ +#endif /* __SOC_ROCKCHIP_RK3288_GPIO_H__ */ diff --git a/src/soc/rockchip/rk3288/soc.c b/src/soc/rockchip/rk3288/soc.c index f5e52eb..e74dbd4 100644 --- a/src/soc/rockchip/rk3288/soc.c +++ b/src/soc/rockchip/rk3288/soc.c @@ -22,7 +22,7 @@ #include <console/console.h> #include <delay.h> #include <device/device.h> -#include <soc/gpio.h> +#include <gpio.h> #include <soc/soc.h> #include <stddef.h> #include <stdlib.h> diff --git a/src/soc/samsung/exynos5250/include/soc/gpio.h b/src/soc/samsung/exynos5250/include/soc/gpio.h index bbe97a1..398e7b0 100644 --- a/src/soc/samsung/exynos5250/include/soc/gpio.h +++ b/src/soc/samsung/exynos5250/include/soc/gpio.h @@ -22,6 +22,8 @@
#include <soc/cpu.h>
+/* TODO: Align interface to src/include/gpio.h! */ + struct gpio_bank { unsigned int con; unsigned int dat; diff --git a/src/soc/samsung/exynos5420/include/soc/gpio.h b/src/soc/samsung/exynos5420/include/soc/gpio.h index 1c6a77b..ee34bc3 100644 --- a/src/soc/samsung/exynos5420/include/soc/gpio.h +++ b/src/soc/samsung/exynos5420/include/soc/gpio.h @@ -22,6 +22,8 @@
#include <soc/cpu.h>
+/* TODO: Align interface to src/include/gpio.h! */ + struct gpio_bank { unsigned int con; unsigned int dat;
-
Patrick Georgi