Tongtong Pan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83790?usp=email )
Change subject: mb/google/dedede:Add fw_config control to wifi driver BUG=b:351968527 ......................................................................
mb/google/dedede:Add fw_config control to wifi driver BUG=b:351968527
Change-Id: I4c7e2fb6fe38c048f29cb8255c4b125ea284de5b Signed-off-by: Tongtong Pan pantongtong@huaqin.corp-partner.google.com --- M src/mainboard/google/dedede/variants/awasuki/overridetree.cb M src/mainboard/google/dedede/variants/awasuki/ramstage.c M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h M src/soc/intel/jasperlake/chip.h 5 files changed, 62 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/83790/1
diff --git a/src/mainboard/google/dedede/variants/awasuki/overridetree.cb b/src/mainboard/google/dedede/variants/awasuki/overridetree.cb index 148840f..9fca591 100644 --- a/src/mainboard/google/dedede/variants/awasuki/overridetree.cb +++ b/src/mainboard/google/dedede/variants/awasuki/overridetree.cb @@ -1,3 +1,11 @@ +fw_config + field WIFI 8 9 + option UNKNOWN 0 + option WIFI_6 1 + option WIFI_6E 2 + end +end + chip soc/intel/jasperlake # USB Port Configuration register "usb2_ports[1]" = "USB2_PORT_EMPTY" @@ -71,10 +79,6 @@ # Set xHCI LFPS period sampling off time register "xhci_lfps_sampling_offtime_ms" = "0"
- # Disable SD card - register "sdcard_cd_gpio" = "0" - register "SdCardPowerEnableActiveHigh" = "0" - device domain 0 on device pci 04.0 on chip drivers/intel/dptf @@ -161,6 +165,7 @@ end end # USB xHCI device pci 14.3 on + probe WIFI WIFI_6E chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" register "enable_cnvi_ddr_rfim" = "true" @@ -181,24 +186,18 @@ end # I2C 0 device pci 15.1 off end # I2C 1 device pci 15.2 on - probe TOUCHSCREEN TOUCHSCREEN_PRESENT - chip drivers/i2c/generic - register "hid" = ""ELAN0001"" - register "desc" = ""ELAN Touchscreen"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)" - register "detect" = "1" - register "reset_gpio" = + chip drivers/i2c/hid + register "generic.hid" = ""ELAN9008"" + register "generic.desc" = ""ELAN Touchscreen"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)" + register "generic.detect" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D5)" - register "reset_delay_ms" = "25" - register "reset_off_delay_ms" = "8" - register "stop_gpio" = - "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" - register "stop_delay_ms" = "280" - register "stop_off_delay_ms" = "2" - register "enable_gpio" = + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)" - register "enable_delay_ms" = "7" - register "has_power_resource" = "1" + register "generic.enable_delay_ms" = "7" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x01" device i2c 10 on end end end # I2C 2 @@ -216,6 +215,7 @@ end end # I2C 4 device pci 1c.7 on + probe WIFI WIFI_6 chip drivers/wifi/generic register "wake" = "GPE0_DW2_03" device pci 00.0 on end diff --git a/src/mainboard/google/dedede/variants/awasuki/ramstage.c b/src/mainboard/google/dedede/variants/awasuki/ramstage.c index 418826c..1591ebb 100644 --- a/src/mainboard/google/dedede/variants/awasuki/ramstage.c +++ b/src/mainboard/google/dedede/variants/awasuki/ramstage.c @@ -4,6 +4,8 @@ #include <fw_config.h> #include <soc/soc_chip.h> #include <soc/gpio.h> +#include <console/console.h> +#include <chip.h>
static const struct pad_config ts_disable_pad[] = { /* A11 : TOUCH_RPT_EN */ @@ -22,16 +24,40 @@ PAD_NC(GPP_H5, NONE), };
+static const struct pad_config wifi_pcie_enable_pad[] = { + /* B8 : WLAN_CLKREQ_ODL */ + PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), + /* D3 : WLAN_PCIE_WAKE_ODL */ + PAD_CFG_GPI_SCI_LOW(GPP_D3, NONE, DEEP, EDGE_SINGLE), +}; + void variant_devtree_update(void) { struct soc_intel_jasperlake_config *cfg = config_of_soc();
if (fw_config_probe(FW_CONFIG(EXT_VR, EXT_VR_ABSENT))) { + printk(BIOS_INFO, "EXT_VR_ABSENT.\n"); cfg->disable_external_bypass_vr = 1; }
if (!fw_config_probe(FW_CONFIG(TOUCHSCREEN, TOUCHSCREEN_PRESENT))) { + printk(BIOS_INFO, "TOUCHSCREEN_ABSENT.\n"); cfg->SerialIoI2cMode[PchSerialIoIndexI2C2] = PchSerialIoDisabled; gpio_configure_pads(ts_disable_pad, ARRAY_SIZE(ts_disable_pad)); } + + if (fw_config_probe(FW_CONFIG(WIFI, WIFI_6))) { + printk(BIOS_INFO, "Enable PCie based Wifi GPIO pins.\n"); + gpio_configure_pads(wifi_pcie_enable_pad,ARRAY_SIZE(wifi_pcie_enable_pad)); + } +} + +void variant_update_soc_chip_config(struct soc_intel_jasperlake_config *config) +{ + if (!fw_config_probe(FW_CONFIG(WIFI, WIFI_6E))) { + printk(BIOS_INFO, "CNVi bluetooth disabled by fw_config\n"); + config->cnvi_bt_core = false; + printk(BIOS_INFO, "CNVi bluetooth audio offload disabled by fw_config\n"); + config->cnvi_bt_audio_offload = false; + } } diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 4a234a8..9185d33 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -19,13 +19,9 @@ option TOUCHSCREEN_ABSENT 0 option TOUCHSCREEN_PRESENT 1 end - field TABLETMODE 10 - option TABLETMODE_DISABLED 0 - option TABLETMODE_ENABLED 1 - end - field LTE 11 - option LTE_ABSENT 0 - option LTE_PRESENT 1 + field TABLETMODE 10 + option TABLETMODE_DISABLED 0 + option TABLETMODE_ENABLED 1 end field AUDIO_AMP 14 16 option UNPROVISIONED 0 @@ -34,6 +30,10 @@ option RT1015P_AUTO 3 option ALC5650 4 end + field LTE 11 + option LTE_ABSENT 0 + option LTE_PRESENT 1 + end field EXT_VR 18 option EXT_VR_PRESENT 0 option EXT_VR_ABSENT 1 diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h index bb9fd5d..47b331c 100644 --- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h @@ -6,6 +6,7 @@ #include <soc/gpio.h> #include <stdint.h> #include <acpi/acpi_device.h> +#include <chip.h>
/* The next set of functions return the gpio table and fill in the number of * entries for each table. */ @@ -48,6 +49,7 @@
/* Modify devictree settings during ramstage. */ void variant_devtree_update(void); +void variant_update_soc_chip_config(struct soc_intel_jasperlake_config *config);
struct psys_config { /* diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index f8d069e..3daa542 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -453,6 +453,13 @@ */ bool disable_external_bypass_vr;
+ /* CNVi BT Core Enable/Disable */ + bool cnvi_bt_core; + + /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ + bool cnvi_bt_audio_offload; + + /* * Core Display Clock Frequency selection, FSP UPD CdClock values + 1 *