Zebreus has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79366?usp=email )
Change subject: vc/amd/psp: Remove unknown section flags ......................................................................
vc/amd/psp: Remove unknown section flags
The `d` flag used in .section is unknown in LLVM/clang 17 and fails the build. It is also not documented in the ARM compiler manual. The GNU assembler supports the `d` flag but it also seems to compile without.
I am not sure what the flag is supposed to do and if it is okay to remove it.
ARM compiler manual: https://developer.arm.com/documentation/101754/0621/armclang-Reference/armcl... GNU compiler manual: https://sourceware.org/binutils/docs/as/Section.html
Change-Id: Ie3735b72349b0cfdd27364a39bcdda390af7bfa5 Signed-off-by: Lennart Eichhorn lennarteichhorn@googlemail.com --- M src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S M src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S M src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S M src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S 4 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/79366/1
diff --git a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S index 40ea411..db6556c 100644 --- a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@
.arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64
// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S index 40ea411..db6556c 100644 --- a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@
.arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64
// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S index 40ea411..db6556c 100644 --- a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@
.arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64
// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S index 40ea411..db6556c 100644 --- a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@
.arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64
// Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte
-
Zebreus (Code Review)