Attention is currently required from: Alicja Michalska, Christian Walter, Eric Lai, Felix Held, Johnny Lin, Jonathan Zhang, Patrick Rudolph, Tim Chu, yuchi.chen@intel.com.
Hello Alicja Michalska, Christian Walter, Eric Lai, Felix Held, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu, build bot (Jenkins), yuchi.chen@intel.com,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85170?usp=email
to look at the new patch set (#5).
The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins)
Change subject: soc/intel/xeon_sp/skx: Configure IOAPICs ......................................................................
soc/intel/xeon_sp/skx: Configure IOAPICs
FSP only configures the PCH IOAPIC. Let coreboot reconfigure all IOAPICs to assign unique IDs to each. Every IOAPIC has 8 GSIs, and the IOAPICs on Socket1 start at GSI 72, thus calculate the excat GSI address for each IOAPIC instead of assume it's a linear address space.
Unselect XEON_SP_HAVE_IIO_IOAPIC to prevent soc_get_ioapic_info() from advertising wrong GSI addresses.
TEST: Booted on ocp/tiogapass with correct GSI bases asigned matching the _PRT advertised GSI bases.
Change-Id: I3bd69e6293b1994a4b3a49361fa7eb45cc0a3a5f Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/xeon_sp/lpc_gen1.c M src/soc/intel/xeon_sp/skx/Kconfig M src/soc/intel/xeon_sp/skx/Makefile.mk A src/soc/intel/xeon_sp/skx/ioapic.c 4 files changed, 76 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/85170/5