Change in coreboot[master]: mb/intel/adlrvp_n: Add support for ADL-N LP5 RVP

[Usha P (Code Review)]

Attention is currently required from: Anilkumar N, Kangheui Won, Tim Wawrzynczak, Reka Norman, Krishna P Bhat D.
Usha P has uploaded a new patch set (#2) to the change originally created by Krishna P Bhat D. ( https://review.coreboot.org/c/coreboot/+/60193 )

Change subject: mb/intel/adlrvp_n: Add support for ADL-N LP5 RVP
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mb/intel/adlrvp_n: Add support for ADL-N LP5 RVP

Add support for Alder lake N LP5 RVP with board ID 0x7.
Since SPD index 7 is unused earlier, ADL-N will use it.

Change-Id: Ib2f53e65f75e23793d8c85ee924827446fd9fea7
Signed-off-by: Krishna Prasad Bhat 
---
M src/mainboard/intel/adlrvp/include/baseboard/variants.h
M src/mainboard/intel/adlrvp/memory.c
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
M src/mainboard/intel/adlrvp/spd/Makefile.inc
A src/mainboard/intel/adlrvp/spd/adlrvp_n_lp5.spd.hex
5 files changed, 100 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/60193/2