Patch set updated for coreboot: 2dc1166 AGESA: Remove duplicate OemCustomizeInitEarly declarations
Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7158
-gerrit
commit 2dc116659f3213e72795189b607304b920e3ae2e Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Tue Oct 21 13:43:46 2014 +0300
AGESA: Remove duplicate OemCustomizeInitEarly declarations
Change-Id: I59b2c3f235a6b30e68e78c2fe4065fbc0488bc4c Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/mainboard/amd/inagua/PlatformGnbPcie.c | 1 + src/mainboard/amd/inagua/PlatformGnbPcieComplex.h | 2 -- src/mainboard/amd/olivehill/PlatformGnbPcie.c | 3 +- .../amd/olivehill/PlatformGnbPcieComplex.h | 32 ---------------------- src/mainboard/amd/parmer/PlatformGnbPcie.c | 3 +- src/mainboard/amd/parmer/PlatformGnbPcieComplex.h | 32 ---------------------- src/mainboard/amd/persimmon/PlatformGnbPcie.c | 1 + .../amd/persimmon/PlatformGnbPcieComplex.h | 4 --- src/mainboard/amd/south_station/PlatformGnbPcie.c | 1 + .../amd/south_station/PlatformGnbPcieComplex.h | 4 --- src/mainboard/amd/thatcher/PlatformGnbPcie.c | 3 +- .../amd/thatcher/PlatformGnbPcieComplex.h | 32 ---------------------- src/mainboard/amd/torpedo/PlatformGnbPcie.c | 1 + src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h | 4 --- src/mainboard/amd/union_station/PlatformGnbPcie.c | 1 + .../amd/union_station/PlatformGnbPcieComplex.h | 4 --- src/mainboard/asrock/e350m1/PlatformGnbPcie.c | 1 + .../asrock/e350m1/PlatformGnbPcieComplex.h | 4 --- src/mainboard/asrock/imb-a180/PlatformGnbPcie.c | 3 +- .../asrock/imb-a180/PlatformGnbPcieComplex.h | 32 ---------------------- src/mainboard/asus/f2a85-m/PlatformGnbPcie.c | 5 +++- .../asus/f2a85-m/PlatformGnbPcieComplex.h | 31 --------------------- src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c | 1 + .../gizmosphere/gizmo/PlatformGnbPcieComplex.h | 4 --- .../hp/pavilion_m6_1035dx/PlatformGnbPcie.c | 5 +++- .../hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h | 31 --------------------- .../jetway/nf81-t56n-lf/PlatformGnbPcie.c | 1 + .../jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h | 2 -- src/mainboard/lenovo/g505s/PlatformGnbPcie.c | 5 +++- .../lenovo/g505s/PlatformGnbPcieComplex.h | 31 --------------------- .../lippert/frontrunner-af/PlatformGnbPcie.c | 1 + .../frontrunner-af/PlatformGnbPcieComplex.h | 4 --- src/mainboard/lippert/toucan-af/PlatformGnbPcie.c | 1 + .../lippert/toucan-af/PlatformGnbPcieComplex.h | 4 --- src/northbridge/amd/agesa/agesawrapper.h | 3 ++ src/northbridge/amd/agesa/family14/agesawrapper.c | 2 -- src/northbridge/amd/agesa/family15/agesawrapper.c | 4 +-- .../amd/agesa/family15rl/agesawrapper.c | 2 -- .../amd/agesa/family15tn/agesawrapper.c | 2 -- .../amd/agesa/family16kb/agesawrapper.c | 2 -- 40 files changed, 35 insertions(+), 274 deletions(-)
diff --git a/src/mainboard/amd/inagua/PlatformGnbPcie.c b/src/mainboard/amd/inagua/PlatformGnbPcie.c index 08cd998..4e8e15f 100644 --- a/src/mainboard/amd/inagua/PlatformGnbPcie.c +++ b/src/mainboard/amd/inagua/PlatformGnbPcie.c @@ -20,6 +20,7 @@ #include "PlatformGnbPcieComplex.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h> #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE diff --git a/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h b/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h index 111ad6f..0b93d9c 100644 --- a/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h +++ b/src/mainboard/amd/inagua/PlatformGnbPcieComplex.h @@ -64,6 +64,4 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEarly); - #endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/amd/olivehill/PlatformGnbPcie.c b/src/mainboard/amd/olivehill/PlatformGnbPcie.c index 0775ad3..903d1bb 100644 --- a/src/mainboard/amd/olivehill/PlatformGnbPcie.c +++ b/src/mainboard/amd/olivehill/PlatformGnbPcie.c @@ -21,9 +21,10 @@ #include "amdlib.h" #include "Ids.h" #include "heapManager.h" -#include "PlatformGnbPcieComplex.h" #include "Filecode.h"
+#include <northbridge/amd/agesa/agesawrapper.h> + #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = { diff --git a/src/mainboard/amd/olivehill/PlatformGnbPcieComplex.h b/src/mainboard/amd/olivehill/PlatformGnbPcieComplex.h deleted file mode 100644 index b3c69cf..0000000 --- a/src/mainboard/amd/olivehill/PlatformGnbPcieComplex.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H -#define _PLATFORM_GNB_PCIE_COMPLEX_H - -#include "Porting.h" -#include "AGESA.h" -#include "amdlib.h" - -VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - ); - -#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/amd/parmer/PlatformGnbPcie.c b/src/mainboard/amd/parmer/PlatformGnbPcie.c index 784f6d9..50f8be5 100644 --- a/src/mainboard/amd/parmer/PlatformGnbPcie.c +++ b/src/mainboard/amd/parmer/PlatformGnbPcie.c @@ -21,9 +21,10 @@ #include "amdlib.h" #include "Ids.h" #include "heapManager.h" -#include "PlatformGnbPcieComplex.h" #include "Filecode.h"
+#include <northbridge/amd/agesa/agesawrapper.h> + #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/* diff --git a/src/mainboard/amd/parmer/PlatformGnbPcieComplex.h b/src/mainboard/amd/parmer/PlatformGnbPcieComplex.h deleted file mode 100644 index b3c69cf..0000000 --- a/src/mainboard/amd/parmer/PlatformGnbPcieComplex.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H -#define _PLATFORM_GNB_PCIE_COMPLEX_H - -#include "Porting.h" -#include "AGESA.h" -#include "amdlib.h" - -VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - ); - -#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcie.c b/src/mainboard/amd/persimmon/PlatformGnbPcie.c index de797c0..0ecc4f1 100644 --- a/src/mainboard/amd/persimmon/PlatformGnbPcie.c +++ b/src/mainboard/amd/persimmon/PlatformGnbPcie.c @@ -20,6 +20,7 @@ #include "PlatformGnbPcieComplex.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h> #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE diff --git a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h index ec8a6e3..4a01875 100644 --- a/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h +++ b/src/mainboard/amd/persimmon/PlatformGnbPcieComplex.h @@ -65,9 +65,5 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/amd/south_station/PlatformGnbPcie.c b/src/mainboard/amd/south_station/PlatformGnbPcie.c index 3798251..884d813 100644 --- a/src/mainboard/amd/south_station/PlatformGnbPcie.c +++ b/src/mainboard/amd/south_station/PlatformGnbPcie.c @@ -20,6 +20,7 @@ #include "PlatformGnbPcieComplex.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h> #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE diff --git a/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h b/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h index 5efcd7d..8660e0a 100644 --- a/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h +++ b/src/mainboard/amd/south_station/PlatformGnbPcieComplex.h @@ -64,9 +64,5 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/amd/thatcher/PlatformGnbPcie.c b/src/mainboard/amd/thatcher/PlatformGnbPcie.c index 4072112..58cc105 100644 --- a/src/mainboard/amd/thatcher/PlatformGnbPcie.c +++ b/src/mainboard/amd/thatcher/PlatformGnbPcie.c @@ -21,9 +21,10 @@ #include "amdlib.h" #include "Ids.h" #include "heapManager.h" -#include "PlatformGnbPcieComplex.h" #include "Filecode.h"
+#include <northbridge/amd/agesa/agesawrapper.h> + #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
/* diff --git a/src/mainboard/amd/thatcher/PlatformGnbPcieComplex.h b/src/mainboard/amd/thatcher/PlatformGnbPcieComplex.h deleted file mode 100644 index b3c69cf..0000000 --- a/src/mainboard/amd/thatcher/PlatformGnbPcieComplex.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H -#define _PLATFORM_GNB_PCIE_COMPLEX_H - -#include "Porting.h" -#include "AGESA.h" -#include "amdlib.h" - -VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - ); - -#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/amd/torpedo/PlatformGnbPcie.c b/src/mainboard/amd/torpedo/PlatformGnbPcie.c index a17a7ed..f8ad709 100644 --- a/src/mainboard/amd/torpedo/PlatformGnbPcie.c +++ b/src/mainboard/amd/torpedo/PlatformGnbPcie.c @@ -20,6 +20,7 @@ #include "PlatformGnbPcieComplex.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h> #include <vendorcode/amd/agesa/f12/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X12_F12PCIECOMPLEXCONFIG_FILECODE diff --git a/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h b/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h index 5efcd7d..8660e0a 100644 --- a/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h +++ b/src/mainboard/amd/torpedo/PlatformGnbPcieComplex.h @@ -64,9 +64,5 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/amd/union_station/PlatformGnbPcie.c b/src/mainboard/amd/union_station/PlatformGnbPcie.c index aa0eedb..12ded1e 100644 --- a/src/mainboard/amd/union_station/PlatformGnbPcie.c +++ b/src/mainboard/amd/union_station/PlatformGnbPcie.c @@ -25,6 +25,7 @@ #include "Filecode.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h b/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h index 5efcd7d..8660e0a 100644 --- a/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h +++ b/src/mainboard/amd/union_station/PlatformGnbPcieComplex.h @@ -64,9 +64,5 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/asrock/e350m1/PlatformGnbPcie.c b/src/mainboard/asrock/e350m1/PlatformGnbPcie.c index eefd27f..9f6af52 100644 --- a/src/mainboard/asrock/e350m1/PlatformGnbPcie.c +++ b/src/mainboard/asrock/e350m1/PlatformGnbPcie.c @@ -25,6 +25,7 @@ #include "Filecode.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h b/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h index 5efcd7d..8660e0a 100644 --- a/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h +++ b/src/mainboard/asrock/e350m1/PlatformGnbPcieComplex.h @@ -64,9 +64,5 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/asrock/imb-a180/PlatformGnbPcie.c b/src/mainboard/asrock/imb-a180/PlatformGnbPcie.c index 24d8381..75fb0c2 100644 --- a/src/mainboard/asrock/imb-a180/PlatformGnbPcie.c +++ b/src/mainboard/asrock/imb-a180/PlatformGnbPcie.c @@ -21,9 +21,10 @@ #include "amdlib.h" #include "Ids.h" #include "heapManager.h" -#include "PlatformGnbPcieComplex.h" #include "Filecode.h"
+#include <northbridge/amd/agesa/agesawrapper.h> + #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
static const PCIe_PORT_DESCRIPTOR PortList [] = { diff --git a/src/mainboard/asrock/imb-a180/PlatformGnbPcieComplex.h b/src/mainboard/asrock/imb-a180/PlatformGnbPcieComplex.h deleted file mode 100644 index 1db8b2d..0000000 --- a/src/mainboard/asrock/imb-a180/PlatformGnbPcieComplex.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H -#define _PLATFORM_GNB_PCIE_COMPLEX_H - -#include "Porting.h" -#include "AGESA.h" -#include "amdlib.h" - -VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - ); - -#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c b/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c index 3a8be41..91b5028 100644 --- a/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c +++ b/src/mainboard/asus/f2a85-m/PlatformGnbPcie.c @@ -17,8 +17,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#include "PlatformGnbPcieComplex.h" +#include "Porting.h" +#include "AGESA.h" +#include "amdlib.h"
+#include <northbridge/amd/agesa/agesawrapper.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE diff --git a/src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h b/src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h deleted file mode 100644 index add9008..0000000 --- a/src/mainboard/asus/f2a85-m/PlatformGnbPcieComplex.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H -#define _PLATFORM_GNB_PCIE_COMPLEX_H - -#include <vendorcode/amd/agesa/f15tn/AGESA.h> -#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h> - -VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - ); - -#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c index cc4bbfb..00bd809 100755 --- a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c +++ b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcie.c @@ -26,6 +26,7 @@ #include "Filecode.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h>
/*---------------------------------------------------------------------------------------*/ /** diff --git a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h index 5cd4b41..88dc25b 100755 --- a/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h +++ b/src/mainboard/gizmosphere/gizmo/PlatformGnbPcieComplex.h @@ -66,9 +66,5 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c b/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c index de046ac..378b48f 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcie.c @@ -17,8 +17,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#include "PlatformGnbPcieComplex.h" +#include "Porting.h" +#include "AGESA.h" +#include "amdlib.h"
+#include <northbridge/amd/agesa/agesawrapper.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE diff --git a/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h b/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h deleted file mode 100644 index add9008..0000000 --- a/src/mainboard/hp/pavilion_m6_1035dx/PlatformGnbPcieComplex.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H -#define _PLATFORM_GNB_PCIE_COMPLEX_H - -#include <vendorcode/amd/agesa/f15tn/AGESA.h> -#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h> - -VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - ); - -#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c index ad4934e..cdeca0b 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c +++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcie.c @@ -21,6 +21,7 @@ #include "PlatformGnbPcieComplex.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h> #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h index dd6f7d7..0d1738e 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h +++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h @@ -79,6 +79,4 @@ #define GNB_GPP_PORT8_CHANNEL_TYPE 4 #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0
-void OemCustomizeInitEarly (IN OUT AMD_EARLY_PARAMS *InitEarly); - #endif /* _PLATFORM_GNB_PCIE_COMPLEX_H */ diff --git a/src/mainboard/lenovo/g505s/PlatformGnbPcie.c b/src/mainboard/lenovo/g505s/PlatformGnbPcie.c index de046ac..378b48f 100644 --- a/src/mainboard/lenovo/g505s/PlatformGnbPcie.c +++ b/src/mainboard/lenovo/g505s/PlatformGnbPcie.c @@ -17,8 +17,11 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */
-#include "PlatformGnbPcieComplex.h" +#include "Porting.h" +#include "AGESA.h" +#include "amdlib.h"
+#include <northbridge/amd/agesa/agesawrapper.h> #include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE diff --git a/src/mainboard/lenovo/g505s/PlatformGnbPcieComplex.h b/src/mainboard/lenovo/g505s/PlatformGnbPcieComplex.h deleted file mode 100644 index add9008..0000000 --- a/src/mainboard/lenovo/g505s/PlatformGnbPcieComplex.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef _PLATFORM_GNB_PCIE_COMPLEX_H -#define _PLATFORM_GNB_PCIE_COMPLEX_H - -#include <vendorcode/amd/agesa/f15tn/AGESA.h> -#include <vendorcode/amd/agesa/f15tn/Lib/amdlib.h> - -VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - ); - -#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c index c06296f..331e27d 100644 --- a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c +++ b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcie.c @@ -25,6 +25,7 @@ #include "Filecode.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h index 02c7f4e..0b57605 100644 --- a/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h +++ b/src/mainboard/lippert/frontrunner-af/PlatformGnbPcieComplex.h @@ -65,9 +65,5 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c b/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c index f8ba912..5677aa8 100644 --- a/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c +++ b/src/mainboard/lippert/toucan-af/PlatformGnbPcie.c @@ -25,6 +25,7 @@ #include "Filecode.h"
#include <string.h> +#include <northbridge/amd/agesa/agesawrapper.h>
#define FILECODE PROC_RECOVERY_MEM_NB_ON_MRNON_FILECODE
diff --git a/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h b/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h index 69e2615..301938c 100644 --- a/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h +++ b/src/mainboard/lippert/toucan-af/PlatformGnbPcieComplex.h @@ -65,9 +65,5 @@ //3:Half-swing(-3.5db) 4:extended length (-6db) 5:extended length(-8db) #define GNB_GPP_PORT8_HOTPLUG_SUPPORT 0 //0:Disable 1:Basic 3:Enhanced
-VOID -OemCustomizeInitEarly ( - IN OUT AMD_EARLY_PARAMS *InitEarly - );
#endif //_PLATFORM_GNB_PCIE_COMPLEX_H diff --git a/src/northbridge/amd/agesa/agesawrapper.h b/src/northbridge/amd/agesa/agesawrapper.h index b94ddf7..49f6666 100644 --- a/src/northbridge/amd/agesa/agesawrapper.h +++ b/src/northbridge/amd/agesa/agesawrapper.h @@ -65,4 +65,7 @@ void *agesawrapper_getlateinitptr (int pick); AGESA_STATUS agesawrapper_fchs3earlyrestore(void); AGESA_STATUS agesawrapper_fchs3laterestore(void);
+void OemCustomizeInitEarly(AMD_EARLY_PARAMS *InitEarly); +void OemCustomizeInitPost(AMD_POST_PARAMS *InitPost); + #endif /* _AGESAWRAPPER_H_ */ diff --git a/src/northbridge/amd/agesa/family14/agesawrapper.c b/src/northbridge/amd/agesa/family14/agesawrapper.c index ee6caaf..1f580ef 100644 --- a/src/northbridge/amd/agesa/family14/agesawrapper.c +++ b/src/northbridge/amd/agesa/family14/agesawrapper.c @@ -46,8 +46,6 @@ VOID *AcpiWheaMce = NULL; VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly); - AGESA_STATUS agesawrapper_amdinitcpuio(VOID) { UINT64 MsrReg; diff --git a/src/northbridge/amd/agesa/family15/agesawrapper.c b/src/northbridge/amd/agesa/family15/agesawrapper.c index 74f9cb9..5c99551 100644 --- a/src/northbridge/amd/agesa/family15/agesawrapper.c +++ b/src/northbridge/amd/agesa/family15/agesawrapper.c @@ -47,11 +47,11 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL;
/* TODO: Function body should be in mainboard directory. */ -static VOID OemCustomizeInitEarly(AMD_EARLY_PARAMS * InitEarly) +void OemCustomizeInitEarly(AMD_EARLY_PARAMS *InitEarly) { }
-static VOID OemCustomizeInitPost(AMD_POST_PARAMS *InitPost) +void OemCustomizeInitPost(AMD_POST_PARAMS *InitPost) { #if IS_ENABLED(CONFIG_BOARD_AMD_DINAR) InitPost->MemConfig.UmaMode = UMA_AUTO; diff --git a/src/northbridge/amd/agesa/family15rl/agesawrapper.c b/src/northbridge/amd/agesa/family15rl/agesawrapper.c index 66a351c..2099a49 100644 --- a/src/northbridge/amd/agesa/family15rl/agesawrapper.c +++ b/src/northbridge/amd/agesa/family15rl/agesawrapper.c @@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly); - AGESA_STATUS agesawrapper_amdinitcpuio(void) { UINT64 MsrReg; diff --git a/src/northbridge/amd/agesa/family15tn/agesawrapper.c b/src/northbridge/amd/agesa/family15tn/agesawrapper.c index 66a351c..2099a49 100644 --- a/src/northbridge/amd/agesa/family15tn/agesawrapper.c +++ b/src/northbridge/amd/agesa/family15tn/agesawrapper.c @@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly); - AGESA_STATUS agesawrapper_amdinitcpuio(void) { UINT64 MsrReg; diff --git a/src/northbridge/amd/agesa/family16kb/agesawrapper.c b/src/northbridge/amd/agesa/family16kb/agesawrapper.c index 66a351c..2099a49 100644 --- a/src/northbridge/amd/agesa/family16kb/agesawrapper.c +++ b/src/northbridge/amd/agesa/family16kb/agesawrapper.c @@ -52,8 +52,6 @@ VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; VOID *AcpiIvrs = NULL;
-VOID OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS * InitEarly); - AGESA_STATUS agesawrapper_amdinitcpuio(void) { UINT64 MsrReg;
-
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