Change in coreboot[master]: mb/google/dedede: Update PCIe and SATA pins for low power consumption

[Teddy Shih (Code Review)]

Teddy Shih has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62776 )

Change subject: mb/google/dedede: Update PCIe and SATA pins for low power consumption
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mb/google/dedede: Update PCIe and SATA pins for low power consumption

To achieve low power consumption, we disable unused PCIe and SATA
pins at beadrix/overridetree.cb according to baseboard/devicetree.cb
and mainboard schematic. After we disable unused PCIe and SATA
pins, the measured power consumption meets Intel reuqired low power
consumption.

BRANCH=dedede
BUG=b:204882915
TEST=on beadrix, measured power consumption meets Intel power
consumption.

Signed-off-by: Teddy Shih 
Change-Id: I79ec524c5ce8f2a79da4aeba084786fb9dac17af
---
M src/mainboard/google/dedede/variants/beadrix/overridetree.cb
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/62776/1

diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb
index 9c6d931..bfd6010 100644
--- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb
@@ -1,7 +1,9 @@
 chip soc/intel/jasperlake

# USB Port Configuration
+	register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable unused USB2P_5 and USB2N_5
    register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"	# Camera
+	register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable unused USB2P_7 and USB2N_7

# Intel Common SoC Config
    #+-------------------+---------------------------+
@@ -73,6 +75,7 @@
    			device i2c 15 on end
    		end
    	end # I2C 0
+		device pci 17.0 off end # SATA. Baseboard/devicetree.cb is off
    	device pci 19.0 on
    		chip drivers/i2c/generic
    			register "hid" = ""10EC5682""
@@ -86,6 +89,8 @@
    			device i2c 1a on end
    		end
    	end # I2C 4
+		device pci 1c.6 off end # PCI Express Root Port 7 / SATA_0. Baseboard/devicetree.cb is off
+		device pci 1c.7 off end # PCI Express Root Port 8 / SATA_1
    	device pci 1f.3 on
    		chip drivers/generic/max98357a
    			register "hid" = ""MX98360A""