Jamie Ryu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46846 )
Change subject: mb/google/volteer: Enable SOC_INTEL_CSE_LITE_SKU_2_0 ......................................................................
mb/google/volteer: Enable SOC_INTEL_CSE_LITE_SKU_2_0
This enables CONFIG_SOC_INTEL_CSE_LITE_SKU_2_0 to add CSE RW blob into FW_MAIN_A_EXTN and FW_MAIN_B_EXTN FMAP regions to optimize boot time.
BUG=b:166982406 TEST=build and boot volteer2 to OS. Verify warm boot time is reduced.
Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Change-Id: Ida67bfd022f4ef1031adbbb8361c8b84d20b92c8 --- M src/mainboard/google/volteer/Kconfig.name 1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/46846/1
diff --git a/src/mainboard/google/volteer/Kconfig.name b/src/mainboard/google/volteer/Kconfig.name index f59d82b..e3da732 100644 --- a/src/mainboard/google/volteer/Kconfig.name +++ b/src/mainboard/google/volteer/Kconfig.name @@ -6,12 +6,14 @@ select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 select DRIVERS_GENESYSLOGIC_GL9755 + select SOC_INTEL_CSE_LITE_SKU_2_0
config BOARD_GOOGLE_ELDRID bool "-> Eldrid" select BOARD_GOOGLE_BASEBOARD_VOLTEER select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 + select SOC_INTEL_CSE_LITE_SKU_2_0
config BOARD_GOOGLE_HALVOR bool "-> Halvor" @@ -33,6 +35,7 @@ select BOARD_GOOGLE_BASEBOARD_VOLTEER select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 + select SOC_INTEL_CSE_LITE_SKU_2_0
config BOARD_GOOGLE_TODOR bool "-> Todor" @@ -57,12 +60,14 @@ select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 select DRIVERS_GENESYSLOGIC_GL9755 + select SOC_INTEL_CSE_LITE_SKU_2_0
config BOARD_GOOGLE_VOXEL bool "-> Voxel" select BOARD_GOOGLE_BASEBOARD_VOLTEER select SOC_INTEL_CSE_LITE_SKU select USE_CAR_NEM_ENHANCED_V2 + select SOC_INTEL_CSE_LITE_SKU_2_0
config BOARD_GOOGLE_BOLDAR bool "-> Boldar" @@ -71,3 +76,5 @@ config BOARD_GOOGLE_ELEMI bool "-> Elemi" select BOARD_GOOGLE_BASEBOARD_VOLTEER + select SOC_INTEL_CSE_LITE_SKU + select SOC_INTEL_CSE_LITE_SKU_2_0
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46846
to look at the new patch set (#4).
Change subject: mb/google/volteer: Enable SOC_INTEL_CSE_RW_UPDATE for qs variants ......................................................................
mb/google/volteer: Enable SOC_INTEL_CSE_RW_UPDATE for qs variants
This enables the CSE firmware update feature for volteer qs variants.
BUG=b:169077783 TEST=build and boot volteer2 to OS. Verify the CSE RW binary and metadata files are included in CBFS.
Signed-off-by: Jamie Ryu jamie.m.ryu@intel.com Change-Id: Ida67bfd022f4ef1031adbbb8361c8b84d20b92c8 --- M src/mainboard/google/volteer/Kconfig.name 1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/46846/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46846 )
Change subject: mb/google/volteer: Enable SOC_INTEL_CSE_RW_UPDATE for qs variants ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46846/5/src/mainboard/google/voltee... File src/mainboard/google/volteer/Kconfig.name:
https://review.coreboot.org/c/coreboot/+/46846/5/src/mainboard/google/voltee... PS5, Line 7: SOC_INTEL_CSE_RW_UPDATE This selection will have to be moved to config.${BOARD} in chromiumos overlay because there are multiple configs that need to be set all together.
Jamie Ryu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46846 )
Change subject: mb/google/volteer: Enable SOC_INTEL_CSE_RW_UPDATE for qs variants ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46846/5/src/mainboard/google/voltee... File src/mainboard/google/volteer/Kconfig.name:
https://review.coreboot.org/c/coreboot/+/46846/5/src/mainboard/google/voltee... PS5, Line 7: SOC_INTEL_CSE_RW_UPDATE
This selection will have to be moved to config. […]
Thanks for comments. I moved SOC_INTEL_CSE_FW_UPDATE to config.${BOARD} files by https://chromium-review.googlesource.com/c/chromiumos/overlays/chromiumos-ov...
As this is all CSE Lite related, I am wondering it is better to move SOC_INTEL_CSE_LITE_SKU to config.${BOARD} also?
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46846 )
Change subject: mb/google/volteer: Enable SOC_INTEL_CSE_RW_UPDATE for qs variants ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46846/5/src/mainboard/google/voltee... File src/mainboard/google/volteer/Kconfig.name:
https://review.coreboot.org/c/coreboot/+/46846/5/src/mainboard/google/voltee... PS5, Line 7: SOC_INTEL_CSE_RW_UPDATE
Thanks for comments. I moved SOC_INTEL_CSE_FW_UPDATE to config. […]
I think it's okay to have SOC_INTEL_CSE_LITE_SKU here because it does not have any external dependencies. The reason for moving SOC_INTEL_CSE_RW_UPDATE to config.${BOARD} is because of the update feature dependency on the CSE RW blob.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46846 )
Change subject: mb/google/volteer: Enable SOC_INTEL_CSE_RW_UPDATE for qs variants ......................................................................
Patch Set 5:
This change can be abandoned now.
Jamie Ryu has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/46846 )
Change subject: mb/google/volteer: Enable SOC_INTEL_CSE_RW_UPDATE for qs variants ......................................................................
Abandoned
-
Furquan Shaikh (Code Review) -
Jamie Ryu (Code Review)