Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45098 )
Change subject: mb/google/zork: Set eMMC drive strength preset to A ......................................................................
mb/google/zork: Set eMMC drive strength preset to A
This change has no effect on depthcharge or the kernel. They don't currently look at the preset values.
BUG=b:159823235 TEST=Boot Ezkinil and dump SDHCI preset registers. Verified they are all set to A.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ie2f3497b65d771820ab1a803fec73265547f8906 --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb 2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/45098/1
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 4edbfa4..0c3276b 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -42,6 +42,7 @@
register "emmc_config" = "{ .timing = SD_EMMC_EMMC_HS400, + .preset_drive_strength = SD_EMMC_DRIVE_STRENGTH_A, }"
register "xhci0_force_gen1" = "0" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 05bee6b..d78c432 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -42,6 +42,7 @@
register "emmc_config" = "{ .timing = SD_EMMC_EMMC_HS400, + .preset_drive_strength = SD_EMMC_DRIVE_STRENGTH_A, }"
register "xhci0_force_gen1" = "0"
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45098 )
Change subject: mb/google/zork: Set eMMC drive strength preset to A ......................................................................
Patch Set 1: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45098 )
Change subject: mb/google/zork: Set eMMC drive strength preset to A ......................................................................
Patch Set 1: Code-Review+2
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45098 )
Change subject: mb/google/zork: Set eMMC drive strength preset to A ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Furquan Shaikh, Marshall Dawson, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45098
to look at the new patch set (#2).
Change subject: mb/google/zork: Set eMMC presets ......................................................................
mb/google/zork: Set eMMC presets
They should be tuned per board to get the best signal and boot time.
This fixes the HS400 preset, so it's correctly set to A. It also changes the SDR50 and DDR50 presets to B. We can't boot correctly when DDR50 is set to A.
I chose 1 as the init kHz value since that's what depthcharge uses to calculate the init clock.
BUG=b:159823235 TEST=Boot Ezkinil and dump SDHCI preset registers.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ie2f3497b65d771820ab1a803fec73265547f8906 --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb 2 files changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/45098/2
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45098 )
Change subject: mb/google/zork: Set eMMC presets ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45098 )
Change subject: mb/google/zork: Set eMMC presets ......................................................................
mb/google/zork: Set eMMC presets
They should be tuned per board to get the best signal and boot time.
This fixes the HS400 preset, so it's correctly set to A. It also changes the SDR50 and DDR50 presets to B. We can't boot correctly when DDR50 is set to A.
I chose 1 as the init kHz value since that's what depthcharge uses to calculate the init clock.
BUG=b:159823235 TEST=Boot Ezkinil and dump SDHCI preset registers.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ie2f3497b65d771820ab1a803fec73265547f8906 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45098 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb M src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb 2 files changed, 20 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index 4004243..ae712ee 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -42,6 +42,16 @@
register "emmc_config" = "{ .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + /* + * The reference design was missing a pull-up on the CMD line. + * This means we can't run at the full 400 kHz. By setting this + * to 1 we run at the slowest frequency possible by the + * controller (~97 kHz). + * + * Boards that have the pull-up should correctly set this. + */ + .init_khz_preset = 1, }"
register "xhci0_force_gen1" = "0" diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 8d475e9..69179ec 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -42,6 +42,16 @@
register "emmc_config" = "{ .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + /* + * The reference design was missing a pull-up on the CMD line. + * This means we can't run at the full 400 kHz. By setting this + * to 1 we run at the slowest frequency possible by the + * controller (~97 kHz). + * + * Boards that have the pull-up should correctly set this. + */ + .init_khz_preset = 1, }"
register "xhci0_force_gen1" = "0"
-
Aaron Durbin (Code Review) -
Furquan Shaikh (Code Review)
-
Marshall Dawson (Code Review)
-
Patrick Georgi (Code Review)
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Raul Rangel (Code Review)