Change in coreboot[master]: sb/intel/common: Refactor _PRT generation to support GSI-based tables
Attention is currently required from: Furquan Shaikh, Angel Pons, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50857 )
Change subject: sb/intel/common: Refactor _PRT generation to support GSI-based tables ......................................................................
Patch Set 8:
(5 comments)
File src/southbridge/intel/common/acpi_pirq_gen.h:
https://review.coreboot.org/c/coreboot/+/50857/comment/edd54748_c1cedde5 PS7, Line 55: [32][4]
Do we have names for the `32` and `4` magic numbers?
Sure, will add.
File src/southbridge/intel/common/acpi_pirq_gen.c:
https://review.coreboot.org/c/coreboot/+/50857/comment/14a2e2db_2b378951 PS7, Line 45: pirq_map->gsi[pirq - PIRQ_A]);
nit: Even though braces aren't strictly necessary for either branch of this conditional block, I'd s […]
Done
https://review.coreboot.org/c/coreboot/+/50857/comment/eced6a03_8946b720 PS7, Line 75: /* pop scope */
Huh?
forgot to remove
https://review.coreboot.org/c/coreboot/+/50857/comment/0b7cdff3_3a852dc7 PS7, Line 85: char matrix[32][4];
Since `intel_create_pirq_matrix()` may not always initialise all elements, I'd add an explicit zero […]
Done
File src/southbridge/intel/common/rcba_pirq.c:
https://review.coreboot.org/c/coreboot/+/50857/comment/620789ab_fc0f1be6 PS7, Line 57: int_pin - PCI_INT_A
This appears four times in the loop body. Maybe: […]
+1.
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Tim Wawrzynczak (Code Review)