Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61433 )
Change subject: soc/intel/skylake: Choose pcr write to disable HECI1 ......................................................................
soc/intel/skylake: Choose pcr write to disable HECI1
Set the SOC_INTEL_COMMON_BLOCK_HECI_DISABLE_USING_PCR config on Skylake to perform heci1 disabling using pcr writes.
BUG=b:211573253, b:211950520 TEST=None
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: Ib6bfa7c48660a6df8d0944de675a4f30fe248d1b --- M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/finalize.c 2 files changed, 4 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/61433/1
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index b90fdef..8464b4a 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -63,6 +63,7 @@ select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL select SOC_INTEL_COMMON_BLOCK_GSPI select SOC_INTEL_COMMON_BLOCK_HDA + select SOC_INTEL_COMMON_BLOCK_HECI_DISABLE_USING_PCR if DISABLE_HECI1_AT_PRE_BOOT select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SCS diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index 733f037..695f7a9 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -9,6 +9,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <intelblocks/cpulib.h> +#include <intelblocks/cse.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/p2sb.h> #include <intelblocks/pcr.h> @@ -30,7 +31,7 @@ #define PCR_PSFX_T0_SHDW_PCIEN 0x1C #define PCR_PSFX_T0_SHDW_PCIEN_FUNDIS (1 << 8)
-static void pch_disable_heci(void) +void soc_disable_heci_using_pcr(void) { /* unhide p2sb device */ p2sb_unhide(); @@ -60,7 +61,7 @@
/* we should disable Heci1 based on the config */ if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT)) - pch_disable_heci(); + heci_disable();
/* Hide p2sb device as the OS must not change BAR0. */ p2sb_hide();