Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/skylake: Enable SATA depending on devicetree enablement ......................................................................
soc/skylake: Enable SATA depending on devicetree enablement
Currently SATA gets enabled by the option EnableSata, but this is duplicate to the devicetree on/off options. Therefore use the on/off options for the enablement of the SATA controller.
I checked all corresponding mainboards if the devicetree configuration matches the EnableSata setting.
Change-Id: I217dcb7178f29bbdeada54bdb774166126b47a5a Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 18 files changed, 14 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/43843/1
diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index b610904..9d7d35f 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -37,7 +37,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataMode" = "0"
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 1327a36..541dc4f 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -163,7 +163,6 @@ register "usb3_ports[9]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# SATA - register "EnableSata" = "1" register "SataSalpSupport" = "1" # SATA4 and SATA5 are located in the lower right corner of the board, # but they are not populated. This is because the same PCB is used to diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index 102450a..4fb2c69 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -49,18 +49,17 @@ register "HeciEnabled" = "0" register "EnableLan" = "1"
- register "EnableSata" = "1" - register "SataSalpSupport" = "1" - register "SataPortsEnable" = "{ \ - [0] = 1, \ - [1] = 0, \ - [2] = 0, \ - [3] = 0, \ - [4] = 0, \ - [5] = 0, \ - [6] = 0, \ - [7] = 0, \ - }" + register "SataSalpSupport" = "1" + register "SataPortsEnable" = "{ \ + [0] = 1, \ + [1] = 0, \ + [2] = 0, \ + [3] = 0, \ + [4] = 0, \ + [5] = 0, \ + [6] = 0, \ + [7] = 0, \ + }"
register "pirqa_routing" = "PCH_IRQ11" register "pirqb_routing" = "PCH_IRQ10" diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 3b1f22c..ad93bb7 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -37,7 +37,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index b8455fe..966b0bb 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -66,7 +66,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "1" diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index f7be80d..cda2adf 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -39,7 +39,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index d57070e..73aef8a 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -33,7 +33,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index fa50283..b5979fc 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -84,7 +84,6 @@
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
- register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb index 07d7385..e6c5c38 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/skylake
# SATA port 0 - register "EnableSata" = "1" register "SataPortsEnable[0]" = "1" register "SataPortsEnable[1]" = "1" register "SataPortsEnable[2]" = "1" diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index 91abfe6..cd3298f 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -127,7 +127,6 @@
register "SsicPortEnable" = "1" # Enable SSIC for WWAN
- register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 7c2a7d7..b296926 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -184,7 +184,6 @@ register "pirqg_routing" = "0x0b" register "pirqh_routing" = "0x0b"
- register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb index 95874bb..353e03a 100644 --- a/src/mainboard/libretrend/lt1000/devicetree.cb +++ b/src/mainboard/libretrend/lt1000/devicetree.cb @@ -39,7 +39,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "1" diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb index bb408a4..b460f74 100644 --- a/src/mainboard/protectli/vault_kbl/devicetree.cb +++ b/src/mainboard/protectli/vault_kbl/devicetree.cb @@ -35,7 +35,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" register "EnableAzalia" = "0" diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb index d44d2ad..1751f63 100644 --- a/src/mainboard/purism/librem_skl/devicetree.cb +++ b/src/mainboard/purism/librem_skl/devicetree.cb @@ -46,7 +46,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "1" diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index 7d54d33..711e04c 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -28,7 +28,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 0dd37ee..52c2c4e 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -26,7 +26,6 @@
# SATA configuration register "SataMode" = "KBLFSP_SATA_MODE_AHCI" - register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 52e4d30..8a95d5e 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -166,8 +166,9 @@ } }
- params->SataEnable = config->EnableSata; - if (config->EnableSata) { + dev = pcidev_path_on_root(PCH_DEVFN_SATA); + params->SataEnable = dev ? dev->enabled : 0; + if (params->SataEnable) { memcpy(params->SataPortsEnable, config->SataPortsEnable, sizeof(params->SataPortsEnable)); memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp, diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 92cd1ba..cd372be 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -156,7 +156,6 @@ u8 LanClkReqNumber;
/* SATA related */ - u8 EnableSata; enum { /* Documentation and header files of Skylake FSP disagree on the values, Kaby Lake FSP (KabylakeFsp0001 on github) uses
Hello Michał Żygowski, Frans Hendriks, Patrick Rudolph, Wim Vervoorn, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43843
to look at the new patch set (#2).
Change subject: soc/skylake: Enable SATA depending on devicetree configuration ......................................................................
soc/skylake: Enable SATA depending on devicetree configuration
Currently SATA gets enabled by the option EnableSata, but this is duplicate to the devicetree on/off options. Therefore use the on/off options for the enablement of the SATA controller.
I checked all corresponding mainboards if the devicetree configuration matches the EnableSata setting.
Change-Id: I217dcb7178f29bbdeada54bdb774166126b47a5a Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 18 files changed, 14 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/43843/2
Hello build bot (Jenkins), Nico Huber, Michał Żygowski, Frans Hendriks, Christian Walter, Angel Pons, Michael Niewöhner, Patrick Rudolph, Wim Vervoorn, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43843
to look at the new patch set (#3).
Change subject: soc/skylake: Enable SATA depending on devicetree configuration ......................................................................
soc/skylake: Enable SATA depending on devicetree configuration
Currently SATA gets enabled by the option EnableSata, but this is duplicate to the devicetree on/off options. Therefore use the on/off options for the enablement of the SATA controller.
I checked all corresponding mainboards if the devicetree configuration matches the EnableSata setting.
Change-Id: I217dcb7178f29bbdeada54bdb774166126b47a5a Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 24 files changed, 14 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/43843/3
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 3: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 3: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/43843/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43843/3//COMMIT_MSG@9 PS3, Line 9: but this is : duplicate to the devicetree on/off options
… this is a duplicate of …
Maybe just use the verb:
… this duplicates the devicetree on/off options.
Christian Walter has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 3: Code-Review+2
Hello build bot (Jenkins), Nico Huber, Michał Żygowski, Frans Hendriks, Christian Walter, Paul Menzel, Angel Pons, Michael Niewöhner, Patrick Rudolph, Wim Vervoorn, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43843
to look at the new patch set (#4).
Change subject: soc/skylake: Enable SATA depending on devicetree configuration ......................................................................
soc/skylake: Enable SATA depending on devicetree configuration
Currently SATA gets enabled by the option EnableSata, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement of the SATA controller.
I checked all corresponding mainboards if the devicetree configuration matches the EnableSata setting.
Change-Id: I217dcb7178f29bbdeada54bdb774166126b47a5a Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 24 files changed, 14 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/43843/4
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43843/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43843/3//COMMIT_MSG@9 PS3, Line 9: but this is : duplicate to the devicetree on/off options
… this is a duplicate of … […]
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 4: Code-Review+2
(24 comments)
https://review.coreboot.org/c/coreboot/+/43843/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43843/4//COMMIT_MSG@7 PS4, Line 7: soc/skylake: Enable SATA depending on devicetree configuration soc/intel/skylake
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/51nb/x210/dev... File src/mainboard/51nb/x210/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/51nb/x210/dev... PS4, Line 149: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/asrock/h110m/... File src/mainboard/asrock/h110m/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/asrock/h110m/... PS4, Line 289: device pci 17.0 on # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/facebook/mono... File src/mainboard/facebook/monolith/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/facebook/mono... PS4, Line 261: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/eve/de... File src/mainboard/google/eve/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/eve/de... PS4, Line 351: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/fizz/v... File src/mainboard/google/fizz/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/fizz/v... PS4, Line 404: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/glados... File src/mainboard/google/glados/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/glados... PS4, Line 132: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... File src/mainboard/google/poppy/variants/atlas/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... PS4, Line 329: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... File src/mainboard/google/poppy/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... PS4, Line 347: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... File src/mainboard/google/poppy/variants/nami/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... PS4, Line 438: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... File src/mainboard/google/poppy/variants/nautilus/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... PS4, Line 370: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... File src/mainboard/google/poppy/variants/nocturne/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... PS4, Line 374: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... File src/mainboard/google/poppy/variants/rammus/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... PS4, Line 333: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... File src/mainboard/google/poppy/variants/soraka/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/google/poppy/... PS4, Line 321: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/intel/kblrvp/... File src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/intel/kblrvp/... PS4, Line 127: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/intel/kblrvp/... File src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/intel/kblrvp/... PS4, Line 171: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/intel/kblrvp/... File src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/intel/kblrvp/... PS4, Line 167: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/intel/saddleb... File src/mainboard/intel/saddlebrook/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/intel/saddleb... PS4, Line 242: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/libretrend/lt... File src/mainboard/libretrend/lt1000/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/libretrend/lt... PS4, Line 200: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/protectli/vau... File src/mainboard/protectli/vault_kbl/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/protectli/vau... PS4, Line 252: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/purism/librem... File src/mainboard/purism/librem_skl/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/purism/librem... PS4, Line 197: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/razer/blade_s... File src/mainboard/razer/blade_stealth_kbl/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/razer/blade_s... PS4, Line 230: device pci 17.0 off end # SATA SATA is disabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/supermicro/x1... File src/mainboard/supermicro/x11-lga1151-series/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43843/4/src/mainboard/supermicro/x1... PS4, Line 129: device pci 17.0 on end # SATA SATA is enabled
https://review.coreboot.org/c/coreboot/+/43843/4/src/soc/intel/skylake/chip.... File src/soc/intel/skylake/chip.c:
https://review.coreboot.org/c/coreboot/+/43843/4/src/soc/intel/skylake/chip.... PS4, Line 170: dev ? dev->enabled : 0 `dev && dev->enabled` is the canonical form to do this.
Hello build bot (Jenkins), Nico Huber, Michał Żygowski, Frans Hendriks, Christian Walter, Paul Menzel, Angel Pons, Michael Niewöhner, Patrick Rudolph, Wim Vervoorn, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43843
to look at the new patch set (#5).
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
soc/intel/skylake: Enable SATA depending on devicetree configuration
Currently SATA gets enabled by the option EnableSata, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement of the SATA controller.
I checked all corresponding mainboards if the devicetree configuration matches the EnableSata setting.
Change-Id: I217dcb7178f29bbdeada54bdb774166126b47a5a Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 24 files changed, 14 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/43843/5
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/43843/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43843/4//COMMIT_MSG@7 PS4, Line 7: soc/skylake: Enable SATA depending on devicetree configuration
soc/intel/skylake
Done
https://review.coreboot.org/c/coreboot/+/43843/4/src/soc/intel/skylake/chip.... File src/soc/intel/skylake/chip.c:
https://review.coreboot.org/c/coreboot/+/43843/4/src/soc/intel/skylake/chip.... PS4, Line 170: dev ? dev->enabled : 0
`dev && dev->enabled` is the canonical form to do this.
I would leave it like that to keep the consistency, since the existing code is handled like that.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 5: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/43843/4/src/soc/intel/skylake/chip.... File src/soc/intel/skylake/chip.c:
https://review.coreboot.org/c/coreboot/+/43843/4/src/soc/intel/skylake/chip.... PS4, Line 170: dev ? dev->enabled : 0
I would leave it like that to keep the consistency, since the existing code is handled like that.
ack, fix the others in that follow-up, too, then :)
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43843/4/src/soc/intel/skylake/chip.... File src/soc/intel/skylake/chip.c:
https://review.coreboot.org/c/coreboot/+/43843/4/src/soc/intel/skylake/chip.... PS4, Line 170: dev ? dev->enabled : 0
ack, fix the others in that follow-up, too, then :)
Ack
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 5: Code-Review-1
(1 comment)
https://review.coreboot.org/c/coreboot/+/43843/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43843/5//COMMIT_MSG@13 PS5, Line 13: I checked all corresponding mainboards if the devicetree configuration This collides with https://review.coreboot.org/43872 which is meant to make these patches easier to review.
Angel Pons has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Removed Code-Review-1 by Angel Pons th3fanbus@gmail.com
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43843/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43843/5//COMMIT_MSG@13 PS5, Line 13: I checked all corresponding mainboards if the devicetree configuration
This collides with https://review.coreboot. […]
Done
Hello build bot (Jenkins), Nico Huber, Michał Żygowski, Frans Hendriks, Christian Walter, Paul Menzel, Michael Niewöhner, Patrick Rudolph, Wim Vervoorn, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43843
to look at the new patch set (#6).
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
soc/intel/skylake: Enable SATA depending on devicetree configuration
Currently SATA gets enabled by the option EnableSata, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement of the SATA controller.
I checked all corresponding mainboards if the devicetree configuration matches the EnableSata setting.
Change-Id: I217dcb7178f29bbdeada54bdb774166126b47a5a Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 24 files changed, 23 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/43843/6
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 6: Code-Review+2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 6: -Code-Review
Hello build bot (Jenkins), Nico Huber, Michał Żygowski, Frans Hendriks, Christian Walter, Paul Menzel, Michael Niewöhner, Patrick Rudolph, Wim Vervoorn, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43843
to look at the new patch set (#7).
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
soc/intel/skylake: Enable SATA depending on devicetree configuration
Currently SATA gets enabled by the option EnableSata, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement of the SATA controller.
I checked all corresponding mainboards if the devicetree configuration matches the EnableSata setting.
Change-Id: I217dcb7178f29bbdeada54bdb774166126b47a5a Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 24 files changed, 14 insertions(+), 36 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/43843/7
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
Patch Set 7: Code-Review+2
aaa
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43843 )
Change subject: soc/intel/skylake: Enable SATA depending on devicetree configuration ......................................................................
soc/intel/skylake: Enable SATA depending on devicetree configuration
Currently SATA gets enabled by the option EnableSata, but this duplicates the devicetree on/off options. Therefore use the on/off options for the enablement of the SATA controller.
I checked all corresponding mainboards if the devicetree configuration matches the EnableSata setting.
Change-Id: I217dcb7178f29bbdeada54bdb774166126b47a5a Signed-off-by: Felix Singer felixsinger@posteo.net Reviewed-on: https://review.coreboot.org/c/coreboot/+/43843 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Michael Niewöhner --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.c M src/soc/intel/skylake/chip.h 24 files changed, 14 insertions(+), 36 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index 8e775b5..398271e 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -37,7 +37,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataMode" = "0"
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 977fa29..c185b10 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -154,7 +154,6 @@ register "usb3_ports[9]" = "USB3_PORT_DEFAULT(OC_SKIP)"
# SATA - register "EnableSata" = "1" register "SataSalpSupport" = "1" # SATA4 and SATA5 are located in the lower right corner of the board, # but they are not populated. This is because the same PCB is used to diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index 751da3e..f9a2b66 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -49,18 +49,17 @@ register "HeciEnabled" = "0" register "EnableLan" = "1"
- register "EnableSata" = "1" - register "SataSalpSupport" = "1" - register "SataPortsEnable" = "{ \ - [0] = 1, \ - [1] = 0, \ - [2] = 0, \ - [3] = 0, \ - [4] = 0, \ - [5] = 0, \ - [6] = 0, \ - [7] = 0, \ - }" + register "SataSalpSupport" = "1" + register "SataPortsEnable" = "{ \ + [0] = 1, \ + [1] = 0, \ + [2] = 0, \ + [3] = 0, \ + [4] = 0, \ + [5] = 0, \ + [6] = 0, \ + [7] = 0, \ + }"
# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index e26128d..64241f8 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -37,7 +37,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index d959b81..4bd4d33 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -66,7 +66,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "1" diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 84e9693..739ecc6 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -39,7 +39,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index d54f716..2634a57 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -43,7 +43,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index f270b19..67864f4 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -33,7 +33,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 78c7d36..1bb88ab 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -33,7 +33,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "EnableAzalia" = "1" diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 7812646..7b0fe60 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -33,7 +33,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 2eb7bd2..3d255c1 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -38,7 +38,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 531e30d..e669fe5 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -43,7 +43,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 03f2979..ec896eb 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -33,7 +33,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index fa50283..b5979fc 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -84,7 +84,6 @@
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
- register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb index 07d7385..e6c5c38 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb @@ -1,7 +1,6 @@ chip soc/intel/skylake
# SATA port 0 - register "EnableSata" = "1" register "SataPortsEnable[0]" = "1" register "SataPortsEnable[1]" = "1" register "SataPortsEnable[2]" = "1" diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb index 91abfe6..cd3298f 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb @@ -127,7 +127,6 @@
register "SsicPortEnable" = "1" # Enable SSIC for WWAN
- register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index d3ca269..7110279 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -175,7 +175,6 @@
# Must leave UART0 enabled or SD/eMMC will not work as PCI
- register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb index dabef4b..b1ffb56 100644 --- a/src/mainboard/libretrend/lt1000/devicetree.cb +++ b/src/mainboard/libretrend/lt1000/devicetree.cb @@ -39,7 +39,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "1" diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb index 5f757e8..40f0d19 100644 --- a/src/mainboard/protectli/vault_kbl/devicetree.cb +++ b/src/mainboard/protectli/vault_kbl/devicetree.cb @@ -35,7 +35,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" register "EnableAzalia" = "0" diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb index 51f6ba4..6e24f5a 100644 --- a/src/mainboard/purism/librem_skl/devicetree.cb +++ b/src/mainboard/purism/librem_skl/devicetree.cb @@ -46,7 +46,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "1" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "1" diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index dc7c42b..9a1ca31 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -28,7 +28,6 @@ # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" - register "EnableSata" = "0" register "SataSalpSupport" = "0" register "SataMode" = "0" register "SataPortsEnable[0]" = "0" diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 0447e70..cf0d6bc 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -17,7 +17,6 @@
# SATA configuration register "SataMode" = "KBLFSP_SATA_MODE_AHCI" - register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ [0] = 1, \ diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index f14a163..3a9dd5c 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -166,8 +166,9 @@ } }
- params->SataEnable = config->EnableSata; - if (config->EnableSata) { + dev = pcidev_path_on_root(PCH_DEVFN_SATA); + params->SataEnable = dev ? dev->enabled : 0; + if (params->SataEnable) { memcpy(params->SataPortsEnable, config->SataPortsEnable, sizeof(params->SataPortsEnable)); memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp, diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 0545840..a9c69cf 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -143,7 +143,6 @@ u8 LanClkReqNumber;
/* SATA related */ - u8 EnableSata; enum { /* Documentation and header files of Skylake FSP disagree on the values, Kaby Lake FSP (KabylakeFsp0001 on github) uses
-
Angel Pons (Code Review) -
Christian Walter (Code Review)
-
Felix Singer (Code Review)
-
Michael Niewöhner (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)