V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48272 )
Change subject: src/soc/intel/alderlake: Enable the PCH HDA ......................................................................
src/soc/intel/alderlake: Enable the PCH HDA
This patch enables the PCH HDA device based on the devicetree configuration.
Change-Id: I1791b769f4ab41cf89d82cf59049a2980c6c1eb0 Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/48272/1
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 868d75e..7e842a2 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -100,6 +100,9 @@ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT;
/* Audio: HDAUDIO_LINK_MODE I2S/SNDW */ + dev = pcidev_path_on_root(PCH_DEVFN_HDA); + m_cfg->PchHdaEnable = is_dev_enabled(dev); + m_cfg->PchHdaDspEnable = config->PchHdaDspEnable; m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable; memcpy(m_cfg->PchHdaAudioLinkDmicEnable, config->PchHdaAudioLinkDmicEnable,
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48272 )
Change subject: src/soc/intel/alderlake: Enable the PCH HDA ......................................................................
Patch Set 1: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48272 )
Change subject: src/soc/intel/alderlake: Enable the PCH HDA ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48272/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48272/1//COMMIT_MSG@10 PS1, Line 10: on the devicetree configuration. put into same line
Hello Furquan Shaikh, Tim Wawrzynczak, Angel Pons, Subrata Banik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48272
to look at the new patch set (#2).
Change subject: src/soc/intel/alderlake: Enable the PCH HDA ......................................................................
src/soc/intel/alderlake: Enable the PCH HDA
This patch enables the PCH HDA device based on the devicetree configuration.
Change-Id: I1791b769f4ab41cf89d82cf59049a2980c6c1eb0 Signed-off-by: V Sowmya v.sowmya@intel.com --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/48272/2
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48272 )
Change subject: src/soc/intel/alderlake: Enable the PCH HDA ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48272/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48272/1//COMMIT_MSG@10 PS1, Line 10: on the devicetree configuration.
put into same line
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48272 )
Change subject: src/soc/intel/alderlake: Enable the PCH HDA ......................................................................
Patch Set 2: Code-Review+2
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48272 )
Change subject: src/soc/intel/alderlake: Enable the PCH HDA ......................................................................
src/soc/intel/alderlake: Enable the PCH HDA
This patch enables the PCH HDA device based on the devicetree configuration.
Change-Id: I1791b769f4ab41cf89d82cf59049a2980c6c1eb0 Signed-off-by: V Sowmya v.sowmya@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/48272 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Subrata Banik subrata.banik@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Subrata Banik: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 868d75e..7e842a2 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -100,6 +100,9 @@ m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT;
/* Audio: HDAUDIO_LINK_MODE I2S/SNDW */ + dev = pcidev_path_on_root(PCH_DEVFN_HDA); + m_cfg->PchHdaEnable = is_dev_enabled(dev); + m_cfg->PchHdaDspEnable = config->PchHdaDspEnable; m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable; memcpy(m_cfg->PchHdaAudioLinkDmicEnable, config->PchHdaAudioLinkDmicEnable,
-
Furquan Shaikh (Code Review) -
Subrata Banik (Code Review)
-
V Sowmya (Code Review)