Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36254 )
Change subject: soc/mediatek/mt8183: Add udelay after setting voltages ......................................................................
soc/mediatek/mt8183: Add udelay after setting voltages
After setting voltages in PMIC wrapper, we have to delay 1us before the voltage reaches the given level.
BRANCH=kukui BUG=b:142358843 TEST=emerge-kukui coreboot
Change-Id: I19d236769c3c0c87513ea4a0a3f64b83e3a844c2 Signed-off-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/mt8183/mt6358.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/36254/1
diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c index 61b1211..b167b27 100644 --- a/src/soc/mediatek/mt8183/mt6358.c +++ b/src/soc/mediatek/mt8183/mt6358.c @@ -874,6 +874,7 @@
pwrap_write_field(PMIC_VCORE_OP_EN, 1, 0x7F, 0); pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0); + udelay(1); }
unsigned int pmic_get_vdram1_vol(void) @@ -895,6 +896,7 @@
pwrap_write_field(PMIC_VDRAM1_OP_EN, 1, 0x7F, 0); pwrap_write_field(PMIC_VDRAM1_VOSEL, vol_reg, 0x7F, 0); + udelay(1); }
unsigned int pmic_get_vddq_vol(void)
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36254 )
Change subject: soc/mediatek/mt8183: Add udelay after setting voltages ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36254 )
Change subject: soc/mediatek/mt8183: Add udelay after setting voltages ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36254/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36254/1//COMMIT_MSG@10 PS1, Line 10: voltage reaches the given level. According to what specification?
Hung-Te Lin has uploaded a new patch set (#2) to the change originally created by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/36254 )
Change subject: soc/mediatek/mt8183: Add udelay after setting voltages ......................................................................
soc/mediatek/mt8183: Add udelay after setting voltages
The SOC DRAM team suggested to delay at least 1us after setting new voltage in PMIC wrapper so the new value can be effective.
BRANCH=kukui BUG=b:142358843 TEST=emerge-kukui coreboot
Change-Id: I19d236769c3c0c87513ea4a0a3f64b83e3a844c2 Signed-off-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/mt8183/mt6358.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/36254/2
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36254 )
Change subject: soc/mediatek/mt8183: Add udelay after setting voltages ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36254/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36254/1//COMMIT_MSG@10 PS1, Line 10: voltage reaches the given level.
According to what specification?
Ack
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36254 )
Change subject: soc/mediatek/mt8183: Add udelay after setting voltages ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36254 )
Change subject: soc/mediatek/mt8183: Add udelay after setting voltages ......................................................................
soc/mediatek/mt8183: Add udelay after setting voltages
The SOC DRAM team suggested to delay at least 1us after setting new voltage in PMIC wrapper so the new value can be effective.
BRANCH=kukui BUG=b:142358843 TEST=emerge-kukui coreboot
Change-Id: I19d236769c3c0c87513ea4a0a3f64b83e3a844c2 Signed-off-by: Yu-Ping Wu yupingso@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36254 Reviewed-by: Julius Werner jwerner@chromium.org Reviewed-by: Hung-Te Lin hungte@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/mediatek/mt8183/mt6358.c 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved Hung-Te Lin: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c index cee9ef2..4ab0e7e 100644 --- a/src/soc/mediatek/mt8183/mt6358.c +++ b/src/soc/mediatek/mt8183/mt6358.c @@ -874,6 +874,7 @@
pwrap_write_field(PMIC_VCORE_OP_EN, 1, 0x7F, 0); pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0); + udelay(1); }
unsigned int pmic_get_vdram1_vol(void) @@ -895,6 +896,7 @@
pwrap_write_field(PMIC_VDRAM1_OP_EN, 1, 0x7F, 0); pwrap_write_field(PMIC_VDRAM1_VOSEL, vol_reg, 0x7F, 0); + udelay(1); }
unsigned int pmic_get_vddq_vol(void)
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Hung-Te Lin (Code Review) -
Julius Werner (Code Review)
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Patrick Georgi (Code Review)
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Paul Menzel (Code Review)
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Yu-Ping Wu (Code Review)