Change in coreboot[master]: cpu/x86/mtrr.c: Allow for multiple TEMP MTRR ranges

[Arthur Heymans (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63555 )

Change subject: cpu/x86/mtrr.c: Allow for multiple TEMP MTRR ranges
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Patch Set 2:

(1 comment)

Patchset:

PS2:
> Practically speaking though, for almost all of these CPUs, the OS will use PATs anyway, and likely disregard the MTRRs.

MTRR setup is already wrong/inefficient on soc/intel (sets up UC for ranges between cbmem_top and TSEG)... On some setups it might make the MTRR caching setup worse such that it slows down the payload a lot if it runs out MTRRs... I'd prefer to avoid possible regressions there.