[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions

[Cliff Huang (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Jamie Ryu, Subrata Banik.

Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email )

Change subject: soc/intel/common/block/pmc: Add GPE1 functions
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Patch Set 8:

(2 comments)

File src/soc/intel/common/block/pmc/pmclib.c:

https://review.coreboot.org/c/coreboot/+/84104/comment/dfa8f207_9d261492?usp... :
PS7, Line 341: pmc_clear_gpi_gpe0_status
> > Subrata, […]

Okay. let me know if I can remove these two or keep them with the GPE1 support.

File src/soc/intel/common/block/pmc/pmclib.c:

https://review.coreboot.org/c/coreboot/+/84104/comment/63687ad2_fab993d9?usp... :
PS8, Line 321: 	soc_pmc_disable_std_gpe1(mask);
> > Subrata,  […]

The only thing left is that if the EN bit(s) have been set prior to going to suspend.