Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43477 )
Change subject: soc/amd/picasso: Drop mainboard_romstage_entry_s3 ......................................................................
soc/amd/picasso: Drop mainboard_romstage_entry_s3
mainboard_romstage_entry_s3() is now unused and hence dropped from picasso.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I10e15422d7eef5af9c19737c32e433718b6479d6 --- D src/soc/amd/picasso/include/soc/romstage.h M src/soc/amd/picasso/romstage.c 2 files changed, 0 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/43477/1
diff --git a/src/soc/amd/picasso/include/soc/romstage.h b/src/soc/amd/picasso/include/soc/romstage.h deleted file mode 100644 index e7ff31a..0000000 --- a/src/soc/amd/picasso/include/soc/romstage.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef __PICASSO_ROMSTAGE_H__ -#define __PICASSO_ROMSTAGE_H__ - -void mainboard_romstage_entry_s3(int s3_resume); - -#endif /* __PICASSO_ROMSTAGE_H__ */ diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 6855bf6..0a337e7 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -10,18 +10,12 @@ #include <console/console.h> #include <program_loading.h> #include <elog.h> -#include <soc/romstage.h> #include <soc/memmap.h> #include <soc/mrc_cache.h> #include <types.h> #include "chip.h" #include <fsp/api.h>
-void __weak mainboard_romstage_entry_s3(int s3_resume) -{ - /* By default, don't do anything */ -} - void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *mcfg = &mupd->FspmConfig; @@ -80,7 +74,6 @@
post_code(0x41); s3_resume = acpi_s3_resume_allowed() && acpi_is_wakeup_s3(); - mainboard_romstage_entry_s3(s3_resume);
post_code(0x42); u32 val = cpuid_eax(1);
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43477 )
Change subject: soc/amd/picasso: Drop mainboard_romstage_entry_s3 ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/43477/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43477/1//COMMIT_MSG@10 PS1, Line 10: picasso. Maybe mention the commit, when it became unused?
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43477 )
Change subject: soc/amd/picasso: Drop mainboard_romstage_entry_s3 ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Paul Menzel, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43477
to look at the new patch set (#3).
Change subject: soc/amd/picasso: Drop mainboard_romstage_entry_s3 ......................................................................
soc/amd/picasso: Drop mainboard_romstage_entry_s3
mainboard_romstage_entry_s3() is now unused and hence dropped from picasso.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I10e15422d7eef5af9c19737c32e433718b6479d6 --- D src/soc/amd/picasso/include/soc/romstage.h M src/soc/amd/picasso/romstage.c 2 files changed, 0 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/43477/3
Hello build bot (Jenkins), Paul Menzel, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43477
to look at the new patch set (#4).
Change subject: soc/amd/picasso: Drop mainboard_romstage_entry_s3 ......................................................................
soc/amd/picasso: Drop mainboard_romstage_entry_s3
mainboard_romstage_entry_s3() was dropped from zork (CB:43476). This function call in picasso does not do anything and hence is being dropped.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I10e15422d7eef5af9c19737c32e433718b6479d6 --- D src/soc/amd/picasso/include/soc/romstage.h M src/soc/amd/picasso/romstage.c 2 files changed, 0 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/43477/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43477 )
Change subject: soc/amd/picasso: Drop mainboard_romstage_entry_s3 ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43477/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43477/1//COMMIT_MSG@10 PS1, Line 10: picasso.
Maybe mention the commit, when it became unused?
Done
Aaron Durbin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43477 )
Change subject: soc/amd/picasso: Drop mainboard_romstage_entry_s3 ......................................................................
soc/amd/picasso: Drop mainboard_romstage_entry_s3
mainboard_romstage_entry_s3() was dropped from zork (CB:43476). This function call in picasso does not do anything and hence is being dropped.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I10e15422d7eef5af9c19737c32e433718b6479d6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43477 Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Aaron Durbin adurbin@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- D src/soc/amd/picasso/include/soc/romstage.h M src/soc/amd/picasso/romstage.c 2 files changed, 0 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Aaron Durbin: Looks good to me, approved
diff --git a/src/soc/amd/picasso/include/soc/romstage.h b/src/soc/amd/picasso/include/soc/romstage.h deleted file mode 100644 index e7ff31a..0000000 --- a/src/soc/amd/picasso/include/soc/romstage.h +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef __PICASSO_ROMSTAGE_H__ -#define __PICASSO_ROMSTAGE_H__ - -void mainboard_romstage_entry_s3(int s3_resume); - -#endif /* __PICASSO_ROMSTAGE_H__ */ diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 6855bf6..0a337e7 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -10,18 +10,12 @@ #include <console/console.h> #include <program_loading.h> #include <elog.h> -#include <soc/romstage.h> #include <soc/memmap.h> #include <soc/mrc_cache.h> #include <types.h> #include "chip.h" #include <fsp/api.h>
-void __weak mainboard_romstage_entry_s3(int s3_resume) -{ - /* By default, don't do anything */ -} - void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *mcfg = &mupd->FspmConfig; @@ -80,7 +74,6 @@
post_code(0x41); s3_resume = acpi_s3_resume_allowed() && acpi_is_wakeup_s3(); - mainboard_romstage_entry_s3(s3_resume);
post_code(0x42); u32 val = cpuid_eax(1);