Change in ...coreboot[master]: soc/intel/cannonlake: Auto turn on HDA controller

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30097

Change subject: soc/intel/cannonlake: Auto turn on HDA controller
......................................................................

soc/intel/cannonlake: Auto turn on HDA controller

Update HDAenable bit in Fsp memory init UPD data base on devicetree
settings.

BUG=N/A
TEST=N/A

Change-Id: I5159c00a855a2a9516714ccee8ee9933465c5063
Signed-off-by: Lijian Zhao 
---
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/romstage/fsp_params.c
2 files changed, 8 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/30097/1

diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 9eb91bd..f148c37 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -130,7 +130,6 @@
    uint8_t SataPortsDevSlp[8];

/* Audio related */
-	uint8_t PchHdaEnable;
    uint8_t PchHdaDspEnable;

/* Enable/Disable HD Audio Link. Muxed with SSP0/SSP1/SNDW1 */
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c
index 8f6fa2f..d188a96 100644
--- a/src/soc/intel/cannonlake/romstage/fsp_params.c
+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c
@@ -61,6 +61,14 @@
    	m_cfg->PchIshEnable = 0;
    else
    	m_cfg->PchIshEnable = dev->enabled;
+
+	/* If HDA is enabled, enable HDA elements */
+	dev = dev_find_slot(0, PCH_DEVFN_HDA);
+	if (!dev)
+		m_cfg->PchHdaEnable = 0;
+	else
+		m_cfg->PchHdaEnable = dev->enabled;
+
 }

void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)