Change in libgfxinit[master]: gma: Extend dummy PTEs for buggy VT-d to 256 before/after the FB

[Nico Huber (Code Review)]

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/48824 )

Change subject: gma: Extend dummy PTEs for buggy VT-d to 256 before/after the FB
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gma: Extend dummy PTEs for buggy VT-d to 256 before/after the FB

Extend Setup_Default_GTT() to add 256 dummy page table entries
around the framebuffer. Newer hardware generations need that many.
In case of some rotations, we need the dummy pages before the
framebuffer allocation, because memory is scanned out backwards.

Change-Id: If918f38a07216c3a7e1403bf6ba6d34ff172bec5
Signed-off-by: Nico Huber 
---
M common/hw-gfx-gma.adb
1 file changed, 16 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/24/48824/1

diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb
index 851686e..1c1ff6e 100644
--- a/common/hw-gfx-gma.adb
+++ b/common/hw-gfx-gma.adb
@@ -651,10 +651,10 @@
    function Valid_FB (FB : Framebuffer_Type) return Boolean is
      (Valid_Stride (FB) and
       FB_First_Page (FB) in GTT_Range and
-      FB_Last_Page (FB) + 128 in GTT_Range and
+      FB_Last_Page (FB) + 256 in GTT_Range and
       (not Rotation_90 (FB) or
        (FB_First_Page (FB) mod 64 = 0 and
-        FB_Last_Page (FB) + 128 + GTT_Rotation_Offset in GTT_Range and
+        FB_Last_Page (FB) + 256 + GTT_Rotation_Offset in GTT_Range and
         FB.Offset >= Word32 (GTT_Rotation_Offset) * GTT_Page_Size)));

-- Also check that we don't overflow the GTT's 39-bit space
@@ -692,6 +692,10 @@
       Phys_Addr : GTT_Address_Type :=
          GTT_Address_Type (Phys_Base) + GTT_Address_Type (Phys_Offset (FB));
    begin
+      -- Add another 256 dummy pages to work around buggy VT-d
+      for Idx in GTT_Range'Last - 255 .. GTT_Range'Last loop
+         Registers.Write_GTT (Idx, Phys_Addr, True);
+      end loop;
       for Idx in FB_First_Page (FB) .. FB_Last_Page (FB) loop
          Registers.Write_GTT
            (GTT_Page       => Idx,
@@ -699,8 +703,8 @@
             Valid          => True);
          Phys_Addr := Phys_Addr + GTT_Page_Size;
       end loop;
-      -- Add another 128 dummy pages to work around buggy VT-d
-      for Idx in FB_Last_Page (FB) + 1 .. FB_Last_Page (FB) + 128 loop
+      -- Add another 256 dummy pages to work around buggy VT-d
+      for Idx in FB_Last_Page (FB) + 1 .. FB_Last_Page (FB) + 256 loop
          Registers.Write_GTT (Idx, Phys_Addr, True);
       end loop;

@@ -710,6 +714,11 @@
             Bytes_Per_Row : constant GTT_Address_Type :=
                GTT_Address_Type (Pixel_To_Bytes (32 * FB.Stride, FB));
          begin
+            -- Add another 256 dummy pages to work around buggy VT-d
+            for Idx in GTT_Rotation_Offset + FB_First_Page (FB) - 256 ..
+                        GTT_Rotation_Offset + FB_First_Page (FB) - 1 loop
+               Registers.Write_GTT (Idx, Phys_Addr, True);
+            end loop;
             Phys_Addr := GTT_Address_Type (Phys_Base) +
                            GTT_Address_Type (Phys_Offset (FB)) +
                            GTT_Address_Type (FB_Size (FB));
@@ -726,8 +735,8 @@
                end if;
             end loop;
          end;
-         -- Add another 128 dummy pages to work around buggy VT-d
-         for Idx in FB_Last_Page (FB) + 1 .. FB_Last_Page (FB) + 128 loop
+         -- Add another 256 dummy pages to work around buggy VT-d
+         for Idx in FB_Last_Page (FB) + 1 .. FB_Last_Page (FB) + 256 loop
             Registers.Write_GTT (GTT_Rotation_Offset + Idx, Phys_Addr, True);
          end loop;
       end if;
@@ -821,7 +830,7 @@
          Decode_Stolen (GTT_Size, Stolen_Size);
          Dev.Resource_Size (Aperture_Size, PCI.Res2);
          Valid :=
-            FB_Last_Page (FB) + 128 + GTT_Off < GTT_Size / Config.GTT_PTE_Size
+            FB_Last_Page (FB) + 256 + GTT_Off < GTT_Size / Config.GTT_PTE_Size
             and
             FB_Last_Page (FB) < Natural (Stolen_Size / GTT_Page_Size)
             and

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/48824 )

Change subject: gma: Extend dummy PTEs for buggy VT-d to 256 before/after the FB
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/libgfxinit/+/48824/1/common/hw-gfx-gma.adb 
File common/hw-gfx-gma.adb:

https://review.coreboot.org/c/libgfxinit/+/48824/1/common/hw-gfx-gma.adb@654 
PS1, Line 654: 256
Would it be a good idea to give a name to this magic constant?

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/48824 )

Change subject: gma: Extend dummy PTEs for buggy VT-d to 256 before/after the FB
......................................................................

Patch Set 1: Code-Review+1

Tested successfully on clevo/l140cu with intel_iommu=on ;; No DMAR/PTE errors but I don't see any without this patch already

[Matt DeVillier (Code Review)]

Attention is currently required from: Nico Huber.
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/48824 )

Change subject: gma: Extend dummy PTEs for buggy VT-d to 256 before/after the FB
......................................................................

Patch Set 1:

(1 comment)

Patchset:

PS1: 
unfortunately still getting DMAR errors even with this patch, which occur directly after the handoff to the i915 framebuffer:

fb0: switching to inteldrmfb from EFI VGA
DMAR: DRHD: handling fault status reg 3
DMAR: [DMA Read] Request device [00:02.0] PASID ffffffff fault addr 9bd5d000 [fault reason 06] PTE Read access is not set
DMAR: DRHD: handling fault status reg 3
DMAR: [DMA Read] Request device [00:02.0] PASID ffffffff fault addr 9bd47000 [fault reason 06] PTE Read access is not set
DMAR: DRHD: handling fault status reg 3
DMAR: [DMA Read] Request device [00:02.0] PASID ffffffff fault addr 9bd57000 [fault reason 06] PTE Read access is not set