Attention is currently required from: Saurabh Mishra, Subrata Banik.
Angel Pons has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/83506?usp=email )
Change subject: device/pci_ids: Add new Intel PTL device IDs for eSPI/LPC
......................................................................
Patch Set 1:
(1 comment)
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/83506/comment/2072e6b9_67171717?usp... :
PS1, Line 3180: #define PCI_DID_INTEL_PTL_H_ESPI_9 0xe409
Hi Subrata, is it required to push 8-31 eSPI IDs for U & H? […]
What I described in https://review.coreboot.org/c/coreboot/+/83506/comment/ef041abf_b118bd01/ would avoid the problem as well
--
To view, visit
https://review.coreboot.org/c/coreboot/+/83506?usp=email
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ie9f0ea9536e2f73c2258e9e12b510d21212248ea
Gerrit-Change-Number: 83506
Gerrit-PatchSet: 1
Gerrit-Owner: Subrata Banik
subratabanik@google.com
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Eric Lai
ericllai@google.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Saurabh Mishra
mishra.saurabh@intel.com
Gerrit-Attention: Saurabh Mishra
mishra.saurabh@intel.com
Gerrit-Attention: Subrata Banik
subratabanik@google.com
Gerrit-Comment-Date: Wed, 17 Jul 2024 18:17:52 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Saurabh Mishra
mishra.saurabh@intel.com
Comment-In-Reply-To: Subrata Banik
subratabanik@google.com