Change in ...coreboot[master]: sb/intel/lynxpoint: Handle H81 only having 6 PCIe root ports - coreboot-gerrit

8 Dec 2018


      Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30077 )
Change subject: sb/intel/lynxpoint: Handle H81 only having 6 PCIe root ports
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Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/#/c/30077/1/src/southbridge/intel/lynxpoint/pcie... 
File src/southbridge/intel/lynxpoint/pcie.c:
https://review.coreboot.org/#/c/30077/1/src/southbridge/intel/lynxpoint/pcie... 
PS1, Line 209: rpc.ports[6]->enabled)
align with opening (
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If3ce217e8a4f4ea4e111e4525b03dbbfc63f92b0
Gerrit-Change-Number: 30077
Gerrit-PatchSet: 1
Gerrit-Owner: Tristan Corrick tristan@corrick.kiwi
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Tristan Corrick tristan@corrick.kiwi
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Comment-Date: Sat, 08 Dec 2018 18:47:49 +0000
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