Attention is currently required from: Arthur Heymans.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68913 )
Change subject: cpu/x86: Set up cpu_info storage using MSR ......................................................................
Patch Set 5:
(2 comments)
File src/arch/x86/include/arch/cpu.h:
https://review.coreboot.org/c/coreboot/+/68913/comment/74acc404_ac278795 PS5, Line 156: (cpuid_edx(0x80000001) & (1 << 29)) != 0; Make this a helper method so you don't need to duplicate it.
https://review.coreboot.org/c/coreboot/+/68913/comment/10fd8e5a_8e936b1e PS5, Line 159: msr_t msr = rdmsr(IA32_GS_BASE); : ci = (struct cpu_info *)(uintptr_t)msr.raw; : return ci; ``` struct per_cpu_segment_data *segment_data = (struct per_cpu_segment_data *)(uintptr_t)msr.raw; return segment_data->cpu_info. ```