Change in coreboot[master]: cpu/x86/mtrr.c: Allow for multiple TEMP MTRR ranges

[Arthur Heymans (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63555 )

Change subject: cpu/x86/mtrr.c: Allow for multiple TEMP MTRR ranges
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Patch Set 2:

(1 comment)

Patchset:

PS2:
> is there a good reason why we use these temporary MTRR ranges to cover the ROM? Why don't we just add the ROM into the global MTRR solution as an uncachable type? POC: https://review.coreboot.org/c/coreboot/+/63557

Generally you want firmware out of the way when the payload is loaded. The payload generally also does not needed ROM access so to minimize MTRR usage it's best not to cache it.