Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30358
Change subject: src/soc/intel/skylake/romstage/romstage_fsp20.c: Add weak CAR pre-console init function ......................................................................
src/soc/intel/skylake/romstage/romstage_fsp20.c: Add weak CAR pre-console init function
Add weak funtion before console initialization in romstage to allow mainboards initialize SuperIO for serial console for example.
Signed-off-by: Michał Żygowski michal.zygowski@3mdeb.com Change-Id: I7a44ad626d97adbd20dee5d13325289c23c176ad --- M src/soc/intel/skylake/include/fsp20/soc/romstage.h M src/soc/intel/skylake/romstage/romstage_fsp20.c 2 files changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/30358/1
diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/fsp20/soc/romstage.h index 364bf52..b7bb604 100644 --- a/src/soc/intel/skylake/include/fsp20/soc/romstage.h +++ b/src/soc/intel/skylake/include/fsp20/soc/romstage.h @@ -20,6 +20,7 @@ #include <fsp/api.h>
void mainboard_memory_init_params(FSPM_UPD *mupd); +void car_mainboard_pre_console_init(void); void systemagent_early_init(void); int smbus_read_byte(unsigned int device, unsigned int address); /* Board type */ diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 2a60158..09af24d 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -140,6 +140,7 @@ uintptr_t top_of_ram; struct chipset_power_state *ps;
+ car_mainboard_pre_console_init(); console_init();
/* Program MCHBAR, DMIBAR, GDXBAR and EDRAMBAR */ @@ -299,3 +300,8 @@ { /* Do nothing */ } + +__weak void car_mainboard_pre_console_init(void) +{ + /* Do nothing */ +} \ No newline at end of file