Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45419 )
Change subject: nb/intel/x4x/iomap.h: Rename to memmap.h ......................................................................
nb/intel/x4x/iomap.h: Rename to memmap.h
It primarily contains definitions for MMIO windows. Also, remove includes from files not directly using the definitions it contains.
Tested with BUILD_TIMELESS=1, Asus P5QL PRO remains identical.
Change-Id: Id28080d9b2924463dd3720492d5e717d65fa0071 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/x4x/acpi/x4x.asl M src/northbridge/intel/x4x/bootblock.c M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/intel/x4x/early_init.c R src/northbridge/intel/x4x/memmap.h M src/northbridge/intel/x4x/northbridge.c M src/northbridge/intel/x4x/raminit.c M src/northbridge/intel/x4x/raminit_ddr23.c M src/northbridge/intel/x4x/rcven.c M src/northbridge/intel/x4x/x4x.h 10 files changed, 6 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/45419/1
diff --git a/src/northbridge/intel/x4x/acpi/x4x.asl b/src/northbridge/intel/x4x/acpi/x4x.asl index 51deea8..5a3c0b6 100644 --- a/src/northbridge/intel/x4x/acpi/x4x.asl +++ b/src/northbridge/intel/x4x/acpi/x4x.asl @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include "hostbridge.asl" -#include "../iomap.h" +#include "../memmap.h" #include <southbridge/intel/common/rcba.h>
/* PCI Device Resource Consumption */ diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c index e83a2b8..cf7690c 100644 --- a/src/northbridge/intel/x4x/bootblock.c +++ b/src/northbridge/intel/x4x/bootblock.c @@ -4,7 +4,6 @@ #include <device/pci_ops.h>
#include "x4x.h" -#include "iomap.h"
void bootblock_early_northbridge_init(void) { diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index 489340a..1d71fe7 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -6,7 +6,6 @@ #include <string.h> #include <types.h> #include "x4x.h" -#include "iomap.h"
static void print_dll_setting(const struct dll_setting *dll_setting, u8 default_verbose) diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index d3c3308..81752cd 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -2,7 +2,6 @@
#include <stdint.h> #include <device/pci_ops.h> -#include "iomap.h" #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #include <southbridge/intel/i82801gx/i82801gx.h> /* DEFAULT_PMBASE */ #else diff --git a/src/northbridge/intel/x4x/iomap.h b/src/northbridge/intel/x4x/memmap.h similarity index 79% rename from src/northbridge/intel/x4x/iomap.h rename to src/northbridge/intel/x4x/memmap.h index 22a675f..e4aafff 100644 --- a/src/northbridge/intel/x4x/iomap.h +++ b/src/northbridge/intel/x4x/memmap.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
-#ifndef X4X_IOMAP_H -#define X4X_IOMAP_H +#ifndef X4X_MEMMAP_H +#define X4X_MEMMAP_H
#define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */ #define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */ @@ -10,4 +10,4 @@
#define TPM_BASE_ADDRESS 0xfed40000
-#endif /* X4X_IOMAP_H */ +#endif /* X4X_MEMMAP_H */ diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 99b1f21..5e46270 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -8,7 +8,7 @@ #include <device/device.h> #include <boot/tables.h> #include <acpi/acpi.h> -#include <northbridge/intel/x4x/iomap.h> +#include <northbridge/intel/x4x/memmap.h> #include <northbridge/intel/x4x/chip.h> #include <northbridge/intel/x4x/x4x.h> #include <cpu/intel/smm_reloc.h> diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 6536fbf..933145a 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -15,7 +15,6 @@ #include <timestamp.h> #include <types.h>
-#include "iomap.h" #include "x4x.h"
#define MRC_CACHE_VERSION 0 diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 89228f6..c3c2da7 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -13,7 +13,6 @@ #include <southbridge/intel/i82801jx/i82801jx.h> #endif #include <string.h> -#include "iomap.h" #include "x4x.h"
#define ME_UMA_SIZEMB 0 diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c index 506282b..82481ab 100644 --- a/src/northbridge/intel/x4x/rcven.c +++ b/src/northbridge/intel/x4x/rcven.c @@ -3,7 +3,6 @@ #include <device/mmio.h> #include <console/console.h> #include <delay.h> -#include "iomap.h" #include "x4x.h"
#define MAX_COARSE 15 diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index 45785a0..98b6038 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -4,7 +4,7 @@ #define __NORTHBRIDGE_INTEL_X4X_H__
#include <stdint.h> -#include "iomap.h" +#include "memmap.h"
/* * D0:F0
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45419 )
Change subject: nb/intel/x4x/iomap.h: Rename to memmap.h ......................................................................
Patch Set 2: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45419 )
Change subject: nb/intel/x4x/iomap.h: Rename to memmap.h ......................................................................
nb/intel/x4x/iomap.h: Rename to memmap.h
It primarily contains definitions for MMIO windows. Also, remove includes from files not directly using the definitions it contains.
Tested with BUILD_TIMELESS=1, Asus P5QL PRO remains identical.
Change-Id: Id28080d9b2924463dd3720492d5e717d65fa0071 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45419 Reviewed-by: Patrick Rudolph siro@das-labor.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/x4x/acpi/x4x.asl M src/northbridge/intel/x4x/bootblock.c M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/intel/x4x/early_init.c R src/northbridge/intel/x4x/memmap.h M src/northbridge/intel/x4x/northbridge.c M src/northbridge/intel/x4x/raminit.c M src/northbridge/intel/x4x/raminit_ddr23.c M src/northbridge/intel/x4x/rcven.c M src/northbridge/intel/x4x/x4x.h 10 files changed, 6 insertions(+), 12 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/northbridge/intel/x4x/acpi/x4x.asl b/src/northbridge/intel/x4x/acpi/x4x.asl index 51deea8..5a3c0b6 100644 --- a/src/northbridge/intel/x4x/acpi/x4x.asl +++ b/src/northbridge/intel/x4x/acpi/x4x.asl @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include "hostbridge.asl" -#include "../iomap.h" +#include "../memmap.h" #include <southbridge/intel/common/rcba.h>
/* PCI Device Resource Consumption */ diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c index baa4ae3..1192fdb 100644 --- a/src/northbridge/intel/x4x/bootblock.c +++ b/src/northbridge/intel/x4x/bootblock.c @@ -5,7 +5,6 @@ #include <device/pci_ops.h>
#include "x4x.h" -#include "iomap.h"
void bootblock_early_northbridge_init(void) { diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index 7378391..1535452 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -6,7 +6,6 @@ #include <string.h> #include <types.h> #include "x4x.h" -#include "iomap.h"
static void print_dll_setting(const struct dll_setting *dll_setting, u8 default_verbose) diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index d3c3308..81752cd 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -2,7 +2,6 @@
#include <stdint.h> #include <device/pci_ops.h> -#include "iomap.h" #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) #include <southbridge/intel/i82801gx/i82801gx.h> /* DEFAULT_PMBASE */ #else diff --git a/src/northbridge/intel/x4x/iomap.h b/src/northbridge/intel/x4x/memmap.h similarity index 79% rename from src/northbridge/intel/x4x/iomap.h rename to src/northbridge/intel/x4x/memmap.h index 22a675f..e4aafff 100644 --- a/src/northbridge/intel/x4x/iomap.h +++ b/src/northbridge/intel/x4x/memmap.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
-#ifndef X4X_IOMAP_H -#define X4X_IOMAP_H +#ifndef X4X_MEMMAP_H +#define X4X_MEMMAP_H
#define DEFAULT_MCHBAR 0xfed14000 /* 16 KB */ #define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */ @@ -10,4 +10,4 @@
#define TPM_BASE_ADDRESS 0xfed40000
-#endif /* X4X_IOMAP_H */ +#endif /* X4X_MEMMAP_H */ diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 99b1f21..5e46270 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -8,7 +8,7 @@ #include <device/device.h> #include <boot/tables.h> #include <acpi/acpi.h> -#include <northbridge/intel/x4x/iomap.h> +#include <northbridge/intel/x4x/memmap.h> #include <northbridge/intel/x4x/chip.h> #include <northbridge/intel/x4x/x4x.h> #include <cpu/intel/smm_reloc.h> diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index c68c70b..a1be5aa 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -14,7 +14,6 @@ #include <timestamp.h> #include <types.h>
-#include "iomap.h" #include "x4x.h"
#define MRC_CACHE_VERSION 0 diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 2c25068..617ce11 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -13,7 +13,6 @@ #include <southbridge/intel/i82801jx/i82801jx.h> #endif #include <string.h> -#include "iomap.h" #include "x4x.h"
#define ME_UMA_SIZEMB 0 diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c index 506282b..82481ab 100644 --- a/src/northbridge/intel/x4x/rcven.c +++ b/src/northbridge/intel/x4x/rcven.c @@ -3,7 +3,6 @@ #include <device/mmio.h> #include <console/console.h> #include <delay.h> -#include "iomap.h" #include "x4x.h"
#define MAX_COARSE 15 diff --git a/src/northbridge/intel/x4x/x4x.h b/src/northbridge/intel/x4x/x4x.h index 45785a0..98b6038 100644 --- a/src/northbridge/intel/x4x/x4x.h +++ b/src/northbridge/intel/x4x/x4x.h @@ -4,7 +4,7 @@ #define __NORTHBRIDGE_INTEL_X4X_H__
#include <stdint.h> -#include "iomap.h" +#include "memmap.h"
/* * D0:F0
-
Angel Pons (Code Review) -
Patrick Rudolph (Code Review)