Attention is currently required from: Dan Callaghan. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58646 )
Change subject: mb/google/brya/var/brya0: add HPS as generic I2C peripheral ......................................................................
Patch Set 1:
(4 comments)
Patchset:
PS1: are there any special power sequencing requirements for the HPS?
File src/mainboard/google/brya/variants/brya0/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/58646/comment/e8a9fa54_d49fd6ea PS1, Line 543: register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)" # EN_HPS_PWR there is also a reset GPIO, not sure if the kernel needs it or not
`register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F20)"`
https://review.coreboot.org/c/coreboot/+/58646/comment/2a928aaf_e040357b PS1, Line 544: ACPI_IRQ_WAKE_LEVEL_HIGH is it intended for the HPS to be able to wake the AP? If so, you'll also need to add
``` register "wake" = "GPE0_DW1_03" ```
https://review.coreboot.org/c/coreboot/+/58646/comment/8806035e_a7155fdc PS1, Line 546: but in brya0, HPS comes out of reset in the STM factory bootloader are we going to need to switch the i2c address here later?
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Tim Wawrzynczak (Code Review)