Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42646 )
Change subject: sb/intel/i82801jx/Kconfig: Sort options alphabetically ......................................................................
sb/intel/i82801jx/Kconfig: Sort options alphabetically
Tested with BUILD_TIMELESS=1, Intel DG43GT remains identical.
Change-Id: Ie5b87726cccf9fb8e45db39a6d6fba8ac4342f5f Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/i82801jx/Kconfig 1 file changed, 19 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/42646/1
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig index b272296..c79b368 100644 --- a/src/southbridge/intel/i82801jx/Kconfig +++ b/src/southbridge/intel/i82801jx/Kconfig @@ -2,25 +2,25 @@
config SOUTHBRIDGE_INTEL_I82801JX bool - select SOUTHBRIDGE_INTEL_COMMON_SMBUS - select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 - select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ - select SOUTHBRIDGE_INTEL_COMMON_PMCLIB - select SOUTHBRIDGE_INTEL_COMMON_PMBASE - select SOUTHBRIDGE_INTEL_COMMON_RTC - select SOUTHBRIDGE_INTEL_COMMON_RESET - select IOAPIC - select USE_WATCHDOG_ON_BOOT - select HAVE_SMI_HANDLER - select HAVE_USBDEBUG_OPTIONS - select SOUTHBRIDGE_INTEL_COMMON_GPIO - select INTEL_DESCRIPTOR_MODE_CAPABLE - select SOUTHBRIDGE_INTEL_COMMON_SMM select ACPI_INTEL_HARDWARE_SLEEP_VALUES select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE - select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select HAVE_SMI_HANDLER + select HAVE_USBDEBUG_OPTIONS + select INTEL_DESCRIPTOR_MODE_CAPABLE + select IOAPIC + select SOUTHBRIDGE_INTEL_COMMON_GPIO + select SOUTHBRIDGE_INTEL_COMMON_PMBASE + select SOUTHBRIDGE_INTEL_COMMON_PMCLIB + select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ + select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_RTC + select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_SMM + select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG + select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select USE_WATCHDOG_ON_BOOT
if SOUTHBRIDGE_INTEL_I82801JX
@@ -28,12 +28,13 @@ hex default 0xfef00000
+config HPET_MIN_TICKS + hex + default 0x80 + ## Some enterprise variants may require an IFD config INTEL_DESCRIPTOR_MODE_REQUIRED bool default n
-config HPET_MIN_TICKS - hex - default 0x80 endif
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42646 )
Change subject: sb/intel/i82801jx/Kconfig: Sort options alphabetically ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42646 )
Change subject: sb/intel/i82801jx/Kconfig: Sort options alphabetically ......................................................................
sb/intel/i82801jx/Kconfig: Sort options alphabetically
Tested with BUILD_TIMELESS=1, Intel DG43GT remains identical.
Change-Id: Ie5b87726cccf9fb8e45db39a6d6fba8ac4342f5f Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42646 Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/southbridge/intel/i82801jx/Kconfig 1 file changed, 19 insertions(+), 18 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig index b272296..c79b368 100644 --- a/src/southbridge/intel/i82801jx/Kconfig +++ b/src/southbridge/intel/i82801jx/Kconfig @@ -2,25 +2,25 @@
config SOUTHBRIDGE_INTEL_I82801JX bool - select SOUTHBRIDGE_INTEL_COMMON_SMBUS - select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 - select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ - select SOUTHBRIDGE_INTEL_COMMON_PMCLIB - select SOUTHBRIDGE_INTEL_COMMON_PMBASE - select SOUTHBRIDGE_INTEL_COMMON_RTC - select SOUTHBRIDGE_INTEL_COMMON_RESET - select IOAPIC - select USE_WATCHDOG_ON_BOOT - select HAVE_SMI_HANDLER - select HAVE_USBDEBUG_OPTIONS - select SOUTHBRIDGE_INTEL_COMMON_GPIO - select INTEL_DESCRIPTOR_MODE_CAPABLE - select SOUTHBRIDGE_INTEL_COMMON_SMM select ACPI_INTEL_HARDWARE_SLEEP_VALUES select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE - select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select HAVE_SMI_HANDLER + select HAVE_USBDEBUG_OPTIONS + select INTEL_DESCRIPTOR_MODE_CAPABLE + select IOAPIC + select SOUTHBRIDGE_INTEL_COMMON_GPIO + select SOUTHBRIDGE_INTEL_COMMON_PMBASE + select SOUTHBRIDGE_INTEL_COMMON_PMCLIB + select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ + select SOUTHBRIDGE_INTEL_COMMON_RESET + select SOUTHBRIDGE_INTEL_COMMON_RTC + select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_SMM + select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG + select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG + select USE_WATCHDOG_ON_BOOT
if SOUTHBRIDGE_INTEL_I82801JX
@@ -28,12 +28,13 @@ hex default 0xfef00000
+config HPET_MIN_TICKS + hex + default 0x80 + ## Some enterprise variants may require an IFD config INTEL_DESCRIPTOR_MODE_REQUIRED bool default n
-config HPET_MIN_TICKS - hex - default 0x80 endif