Harshit Sharma has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select ASAN_IN_ROMSTAGE ......................................................................
soc/intel/apollolake: Select ASAN_IN_ROMSTAGE
ASan in romstage is disabled by default. So, enable it when ASan is selected.
Tested on Siemens MC-APL3
Change-Id: I2f2f965151a4ef4672f2f16979a6ad8492879aeb Signed-off-by: Harshit Sharma harshitsharmajs@gmail.com --- M src/soc/intel/apollolake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/44159/1
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index f837a2e..b485845 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -105,6 +105,7 @@ select NO_UART_ON_SUPERIO select INTEL_GMA_ACPI select INTEL_GMA_SWSMISCI + select ASAN_IN_ROMSTAGE if ASAN_IN_RAMSTAGE
config CHROMEOS select CHROMEOS_RAMOOPS_DYNAMIC
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select ASAN_IN_ROMSTAGE ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44159/1/src/soc/intel/apollolake/Kc... File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/44159/1/src/soc/intel/apollolake/Kc... PS1, Line 108: select ASAN_IN_ROMSTAGE if ASAN_IN_RAMSTAGE You select ASAN_IN_RAMSTAGE elsewhere and suddenly the romstage's behavior changes? I'm not sure I like that idea...
Harshit Sharma has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select ASAN_IN_ROMSTAGE ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44159/1/src/soc/intel/apollolake/Kc... File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/44159/1/src/soc/intel/apollolake/Kc... PS1, Line 108: select ASAN_IN_ROMSTAGE if ASAN_IN_RAMSTAGE
You select ASAN_IN_RAMSTAGE elsewhere and suddenly the romstage's behavior changes? I'm not sure I l […]
Instead of having three config options (ASAN, ASAN_IN_RAMSTAGE & ASAN_IN_ROMSTAGE), I thought of creating just two where ASan in ramstage is enabled by default for all platforms when ASan is selected from config menu. And once it is selected, we can enable ASan in romstage on the platforms for which we have done testing. What do you propose?
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select ASAN_IN_ROMSTAGE ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44159/1/src/soc/intel/apollolake/Kc... File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/44159/1/src/soc/intel/apollolake/Kc... PS1, Line 108: select ASAN_IN_ROMSTAGE if ASAN_IN_RAMSTAGE
Instead of having three config options (ASAN, ASAN_IN_RAMSTAGE & ASAN_IN_ROMSTAGE), I thought of cre […]
So something we do a lot is to mark platforms/chips/boards/whatever that support a given feature with HAVE_*, so apollo lake could select both HAVE_ASAN_IN_ROMSTAGE and HAVE_ASAN_IN_RAMSTAGE.
Then, in some more common area, we expose them to the user:
config ASAN_IN_ROMSTAGE bool "Enable Address Sanitizer in romstage" default n depends on HAVE_ASAN_IN_ROMSTAGE
Hello build bot (Jenkins), Patrick Georgi, Werner Zeh, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44159
to look at the new patch set (#2).
Change subject: soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE ......................................................................
soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE
Enable ASan in romstage for apollolake as it has been tested on Siemens MC-APL3.
Change-Id: I2f2f965151a4ef4672f2f16979a6ad8492879aeb Signed-off-by: Harshit Sharma harshitsharmajs@gmail.com --- M src/soc/intel/apollolake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/44159/2
Harshit Sharma has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44159/1/src/soc/intel/apollolake/Kc... File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/44159/1/src/soc/intel/apollolake/Kc... PS1, Line 108: select ASAN_IN_ROMSTAGE if ASAN_IN_RAMSTAGE
So something we do a lot is to mark platforms/chips/boards/whatever that support a given feature wit […]
Done.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE ......................................................................
Patch Set 2: Code-Review+1
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE ......................................................................
Patch Set 2: Code-Review+2
Has been tested on mc_apl1 as well with no issues.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE ......................................................................
soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE
Enable ASan in romstage for apollolake as it has been tested on Siemens MC-APL3.
Change-Id: I2f2f965151a4ef4672f2f16979a6ad8492879aeb Signed-off-by: Harshit Sharma harshitsharmajs@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44159 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Werner Zeh werner.zeh@siemens.com --- M src/soc/intel/apollolake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Werner Zeh: Looks good to me, approved
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index f837a2e..964e7d4 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -105,6 +105,7 @@ select NO_UART_ON_SUPERIO select INTEL_GMA_ACPI select INTEL_GMA_SWSMISCI + select HAVE_ASAN_IN_ROMSTAGE
config CHROMEOS select CHROMEOS_RAMOOPS_DYNAMIC
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44159 )
Change subject: soc/intel/apollolake: Select HAVE_ASAN_IN_ROMSTAGE ......................................................................
Patch Set 3:
Automatic boot test returned (PASS/FAIL/TOTAL): 6/1/7 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/16043 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/16042 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/16041 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/16040 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/16039 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/16045 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/16044
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Harshit Sharma (Code Review)
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Patrick Georgi (Code Review)
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Paul Menzel (Code Review)
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Werner Zeh (Code Review)