Change in coreboot[master]: siemens/mc_apl1: Move SCI to IRQ 10

[Mario Scheithauer (Code Review)]

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/21418

Change subject: siemens/mc_apl1: Move SCI to IRQ 10
......................................................................

siemens/mc_apl1: Move SCI to IRQ 10

IRQ 9 is used for different purpose on this mainboard so move SCI away
to IRQ 10.

Change-Id: I4b8bfbdd8ab9498197603572b0e533f405a340fe
Signed-off-by: Mario Scheithauer 
---
M src/mainboard/siemens/mc_apl1/mainboard.c
1 file changed, 16 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/21418/1

diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c
index 4c90aff..f57047b 100644
--- a/src/mainboard/siemens/mc_apl1/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/mainboard.c
@@ -20,7 +20,9 @@
 #include <hwilib.h>
 #include <i210.h>
 #include <intelblocks/lpc_lib.h>
+#include <intelblocks/pmclib.h>
 #include <soc/pci_devs.h>
+#include <soc/pm.h>
 #include <string.h>
 #include "brd_gpio.h"
 #include "ptn3460.h"
@@ -112,6 +114,19 @@
    gpio_configure_pads(pads, num);
 }

+static void mainboard_enable(device_t dev)
+{
+	uint32_t irq_sel_2 = 0;
+	uintptr_t pmc_bar = 0;
+
+	/* Route SCI to IRQ 10 to free IRQ 9 slot. */
+	pmc_bar = soc_read_pmc_base();
+	irq_sel_2 = read32((void *)pmc_bar + IRQ_SEL_2);
+	irq_sel_2 &= ~SCI_IRQ_MASK;
+	irq_sel_2 |= SCI_IRQ_10;
+	write32((void *)(pmc_bar + IRQ_SEL_2), irq_sel_2);
+}
+
 static void mainboard_final(void *chip_info)
 {
    int status;
@@ -132,5 +147,6 @@

struct chip_operations mainboard_ops = {
    .init = mainboard_init,
+	.enable_dev = mainboard_enable,
    .final = mainboard_final,
 };