Change in coreboot[master]: soc/amd/cezanne: Generate IVRS for cezanne

[Paul Fagerburg (Code Review)]

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56451 )

Change subject: soc/amd/cezanne: Generate IVRS for cezanne
......................................................................

soc/amd/cezanne: Generate IVRS for cezanne

Generate IVRS for cezanne using common IVRS generation code.

BUG=b:190515051
TEST=Build cezanne coreboot image. Compare IVRS table with agesa
generated tables.

Signed-off-by: Jason Glenesk 
Change-Id: Ie15addba62ec7da25a7452512b6871e46c61b0a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56451
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
---
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/cezanne/agesa_acpi.c
2 files changed, 10 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved

diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index fab31d4..306f181 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -42,6 +42,7 @@
    select SOC_AMD_COMMON_BLOCK_ACPIMMIO
    select SOC_AMD_COMMON_BLOCK_ACPI_ALIB
    select SOC_AMD_COMMON_BLOCK_ACPI_GPIO
+	select SOC_AMD_COMMON_BLOCK_ACPI_IVRS
    select SOC_AMD_COMMON_BLOCK_AOAC
    select SOC_AMD_COMMON_BLOCK_APOB
    select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
diff --git a/src/soc/amd/cezanne/agesa_acpi.c b/src/soc/amd/cezanne/agesa_acpi.c
index 35114a1..47ca5f2 100644
--- a/src/soc/amd/cezanne/agesa_acpi.c
+++ b/src/soc/amd/cezanne/agesa_acpi.c
@@ -10,8 +10,17 @@
 uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
    			  acpi_rsdp_t *rsdp)
 {
+	acpi_ivrs_t *ivrs;
+
    /* add ALIB SSDT from HOB */
    current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current);

+	/* IVRS */
+	current = ALIGN(current, 8);
+	ivrs = (acpi_ivrs_t *) current;
+	acpi_create_ivrs(ivrs, acpi_fill_ivrs);
+	current += ivrs->header.length;
+	acpi_add_table(rsdp, ivrs);
+
    return current;
 }