Zhuohao Lee has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60439 )
Change subject: mb/google/brya/var/brask: Change TPM I2C to I2C1 ......................................................................
mb/google/brya/var/brask: Change TPM I2C to I2C1
The latest schematics changes the TPM I2C from I2C3 to I2C1. This patch fixes the TPM I2C bus assignment.
BUG=b:211886429 TEST=build pass
Change-Id: I70d5a8fde1866c5dd4587ab5af2d41724c60ee0c Signed-off-by: Zhuohao Lee zhuohao@chromium.org --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb M src/mainboard/google/brya/variants/baseboard/brask/gpio.c 3 files changed, 10 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/60439/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 9363d6e..d16339d 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -76,7 +76,7 @@ hex default 0x3 if BOARD_GOOGLE_BRYA0 default 0x3 if BOARD_GOOGLE_BRYA4ES - default 0x3 if BOARD_GOOGLE_BRASK + default 0x1 if BOARD_GOOGLE_BRASK default 0x1 if BOARD_GOOGLE_PRIMUS default 0x3 if BOARD_GOOGLE_PRIMUS4ES default 0x1 if BOARD_GOOGLE_GIMBLE diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb index 4662b95..ab50af4 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb @@ -77,7 +77,7 @@ #+-------------------+---------------------------+ #| GSPI1 | Fingerprint MCU | #| I2C0 | Audio | - #| I2C3 | cr50 TPM. Early init is | + #| I2C1 | cr50 TPM. Early init is | #| | required to set up a BAR | #| | for TPM communication | #+-------------------+---------------------------+ @@ -85,9 +85,12 @@ .i2c[0] = { .speed = I2C_SPEED_FAST, }, - .i2c[3] = { + .i2c[1] = { .early_init = 1, .speed = I2C_SPEED_FAST, + .rise_time_ns = 600, + .fall_time_ns = 400, + .data_hold_time_ns = 50, }, }"
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index 5ad8e46..756c89c 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -371,10 +371,6 @@ PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), /* B4 : PROC_GP3 ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_B4, 0, DEEP), - /* B7 : ISH_12C1_SDA ==> PCH_I2C_TPM_SDA */ - PAD_CFG_NF(GPP_B7, NONE, DEEP, NF2), - /* B8 : ISH_12C1_SCL ==> PCH_I2C_TPM_SCL */ - PAD_CFG_NF(GPP_B8, NONE, DEEP, NF2), /* * D1 : ISH_GP1 ==> FP_RST_ODL * FP_RST_ODL comes out of reset as hi-z and does not have an external pull-down. @@ -390,6 +386,10 @@ PAD_CFG_GPO(GPP_D11, 1, DEEP), /* E15 : RSVD_TP ==> PCH_WP_OD */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP), + /* H6 : I2C1_SDA ==> PCH_I2C_TPM_SDA */ + PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), + /* H7 : I2C1_SCL ==> PCH_I2C_TPM_SCL */ + PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), /* H10 : UART0_RXD ==> UART_PCH_RX_DBG_TX */ PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */