[S] Change in blobs[main]: soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1

[Xixi Chen (Code Review)]

Attention is currently required from: Xixi Chen, Yidi Lin, Yu-Ping Wu.

Hello Yidi Lin, Yu-Ping Wu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/blobs/+/83748?usp=email

to look at the new patch set (#6).

Change subject: soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1
......................................................................

soc/mediatek/mt8186: Update DRAM binary from 0.1.0 to 0.1.1

For fast-k RX flow, Vref value is read from the MRC_CACHE, but the
preferred RX Vref value 0xE is set, with no re-calibration. But some
DRAM vendor may use higher RX Vref value, increase the default RX Vref
value (from full-k reference) to make different DRAM RX Vref compatible.

BUG=b:352632973
TEST=Check the Nanya DRAM fast-k RX Vref value is normal
     Logs:
       [3732][CH0][RK0][RX] Best Vref B0 = 22, Window Min 25 at DQ5 ...
       [3732][CH0][RK0][RX] Best Vref B1 = 22, Window Min 28 at DQ10 ...
     The "Best Vref" value is the same to full-k Vref.

Signed-off-by: Xi Chen 
Change-Id: Id7df502346d590d3cf3827f48d868da021f6ec9d
---
M soc/mediatek/mt8186/dram.elf
M soc/mediatek/mt8186/dram.elf.md5
M soc/mediatek/mt8186/dram_release_notes.txt
3 files changed, 9 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/blobs refs/changes/48/83748/6