Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Tarun Tuli, Angel Pons.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 )

Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM
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Patch Set 17:

(1 comment)

File src/acpi/acpi.c:

https://review.coreboot.org/c/coreboot/+/63969/comment/5554087d_e9d3e132 
PS17, Line 1485: __weak uint8_t soc_lpi_get_constraints(void) { return 0; }
> Another option is the weak implementation does the single device/dummy entry creation and that gets replaced with the more extensive one on the platform if it exists?

I like this one, moves the "default" logic to a now "default" place 👍