Change in coreboot[master]: mb/intel/adlrvp: Add support for external clock buffer

[Subrata Banik (Code Review)]

Subrata Banik has uploaded a new patch set (#2) to the change originally created by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/59976 )

Change subject: mb/intel/adlrvp: Add support for external clock buffer
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mb/intel/adlrvp: Add support for external clock buffer

ADL-P silicon can support 7 SRC CLK's and 10 CLKREQ signals.
Out of 7 SRCCLK's 3 will be used for CPU. Rests CLK SRC's are for PCH.
Now if more than 4 PCH devices connected on the platform, external
differential buffer chip needs to be placed at platform level.

A mainboard designer can choose to add an external clock chip,
and select the SRC CLK using CONFIG_INTERNAL_CLKSRC_BUFFER.

CONFIG_INTERNAL_CLKSRC_BUFFER provides the CLKSRC that feed clock to
discrete buffer for further distribution to platform.

Change-Id: I21f1155374049c90aa45db25d4128b39aa5898bb
Signed-off-by: Subrata Banik 
---
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
2 files changed, 35 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/59976/2