Attention is currently required from: Lee Leahy, Angel Pons, Huang Jin, Patrick Rudolph. Hello build bot (Jenkins), Lee Leahy, Angel Pons, Huang Jin, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/52785
to look at the new patch set (#2).
Change subject: drivers/intel/fsp1_1: Remove verstage compilation units ......................................................................
drivers/intel/fsp1_1: Remove verstage compilation units
Only SOC_INTEL_BRASWELL is using FSP1.1. It has too little CAR available set up by FSP-T to have VBOOT_STARTS_IN_BOOTBLOCK and therefore verstage is not possible either.
Change-Id: I54361c835055907c2a4414ec26a1495425d4ef09 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/drivers/intel/fsp1_1/Makefile.inc D src/drivers/intel/fsp1_1/verstage.c 2 files changed, 0 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/52785/2