Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45691 )
Change subject: soc/intel/skylake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
soc/intel/skylake/acpi/gpio.asl: Use ASL 2.0 syntax
Some methods deliberately remain untouched in this commit, so as not to collide with another patch train that already takes care of them.
Tested with BUILD_TIMELESS=1, Purism Librem 15v4 does not change.
Change-Id: Ib27c5b48459e3ea7eabc34457cb204994ee9b617 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/skylake/acpi/gpio.asl 1 file changed, 34 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/45691/1
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl index 60e1cf5..645038b 100644 --- a/src/soc/intel/skylake/acpi/gpio.asl +++ b/src/soc/intel/skylake/acpi/gpio.asl @@ -24,29 +24,28 @@ /* GPIO Community 0 */ CreateDWordField (^RBUF, ^COM0._BAS, BAS0) CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - Store (^^PCRB (PID_GPIOCOM0), BAS0) - Store (GPIO_BASE_SIZE, LEN0) + BAS0 = ^^PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
/* GPIO Community 1 */ CreateDWordField (^RBUF, ^COM1._BAS, BAS1) CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - Store (^^PCRB (PID_GPIOCOM1), BAS1) - Store (GPIO_BASE_SIZE, LEN1) + BAS1 = ^^PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
/* GPIO Community 3 */ CreateDWordField (^RBUF, ^COM3._BAS, BAS3) CreateDWordField (^RBUF, ^COM3._LEN, LEN3) - Store (^^PCRB (PID_GPIOCOM3), BAS3) - Store (GPIO_BASE_SIZE, LEN3) + BAS3 = ^^PCRB (PID_GPIOCOM3) + LEN3 = GPIO_BASE_SIZE
CreateDWordField (^RBUF, ^GIRQ._INT, IRQN) - And (^^PCRR (PID_GPIOCOM0, GPIO_MISCCFG), - GPIO_DRIVER_IRQ_ROUTE_MASK, Local0) + Local0 = ^^PCRR (PID_GPIOCOM0, GPIO_MISCCFG) & GPIO_DRIVER_IRQ_ROUTE_MASK
- If (LEqual (Local0, GPIO_DRIVER_IRQ_ROUTE_IRQ14)) { - Store (GPIO_IRQ14, IRQN) + If (Local0 == GPIO_DRIVER_IRQ_ROUTE_IRQ14) { + IRQN = GPIO_IRQ14 } Else { - Store (GPIO_IRQ15, IRQN) + IRQN = GPIO_IRQ15 }
Return (RBUF) @@ -66,46 +65,47 @@ { #if CONFIG(SKYLAKE_SOC_PCH_H) /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23))) + If ((Arg0 >= GPP_A0) && (Arg0 <= GPP_B23)) { - Store (PID_GPIOCOM0, Local0) - Subtract (Arg0, GPP_A0, Local1) + Local0 = PID_GPIOCOM0 + Local1 = Arg0 - GPP_A0 } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_H23))) + If ((Arg0 >= GPP_C0) && (Arg0 <= GPP_H23)) { - Store (PID_GPIOCOM1, Local0) - Subtract (Arg0, GPP_C0, Local1) + Local0 = PID_GPIOCOM1 + Local1 = Arg0 - GPP_C0 } - /* GPIO Community 03 */ - If (LAnd (LGreaterEqual (Arg0, GPP_I0), LLessEqual (Arg0, GPP_I10))) + /* GPIO Community 3 */ + If ((Arg0 >= GPP_I0) && (Arg0 <= GPP_I10)) { - Store (PID_GPIOCOM3, Local0) - Subtract (Arg0, GPP_I0, Local1) + Local0 = PID_GPIOCOM3 + Local1 = Arg0 - GPP_I0 } #else /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23))) + If ((Arg0 >= GPP_A0) && (Arg0 <= GPP_B23)) { - Store (PID_GPIOCOM0, Local0) - Subtract (Arg0, GPP_A0, Local1) + Local0 = PID_GPIOCOM0 + Local1 = Arg0 - GPP_A0 } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_E23))) + If ((Arg0 >= GPP_C0) && (Arg0 <= GPP_E23)) { - Store (PID_GPIOCOM1, Local0) - Subtract (Arg0, GPP_C0, Local1) + Local0 = PID_GPIOCOM1 + Local1 = Arg0 - GPP_C0 } - /* GPIO Community 03*/ - If (LAnd (LGreaterEqual (Arg0, GPP_F0), LLessEqual (Arg0, GPP_G7))) + /* GPIO Community 3 */ + If ((Arg0 >= GPP_F0) && (Arg0 <= GPP_G7)) { - Store (PID_GPIOCOM3, Local0) - Subtract (Arg0, GPP_F0, Local1) + Local0 = PID_GPIOCOM3 + Local1 = Arg0 - GPP_F0 } #endif /* CONFIG_SKYLAKE_SOC_PCH_H */ - Store (PCRB (Local0), Local2) - Add (Local2, PAD_CFG_BASE, Local2) - Return (Add (Local2, Multiply (Local1, 8))) + + Local2 = PCRB (Local0) + Local2 += PAD_CFG_BASE + Return (Local2 + (Local1 * 8)) }
/*
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45691
to look at the new patch set (#2).
Change subject: soc/intel/skylake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
soc/intel/skylake/acpi/gpio.asl: Use ASL 2.0 syntax
While we're at it, fix up cosmetics on a few comments.
Some methods deliberately remain untouched in this commit, so as not to collide with another patch train that already takes care of them.
Tested with BUILD_TIMELESS=1, Purism Librem 15v4 does not change.
Change-Id: Ib27c5b48459e3ea7eabc34457cb204994ee9b617 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/skylake/acpi/gpio.asl 1 file changed, 34 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/45691/2
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45691 )
Change subject: soc/intel/skylake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
Patch Set 2: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45691 )
Change subject: soc/intel/skylake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
Patch Set 2: Code-Review+2
Awesome Angel
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45691 )
Change subject: soc/intel/skylake/acpi/gpio.asl: Use ASL 2.0 syntax ......................................................................
soc/intel/skylake/acpi/gpio.asl: Use ASL 2.0 syntax
While we're at it, fix up cosmetics on a few comments.
Some methods deliberately remain untouched in this commit, so as not to collide with another patch train that already takes care of them.
Tested with BUILD_TIMELESS=1, Purism Librem 15v4 does not change.
Change-Id: Ib27c5b48459e3ea7eabc34457cb204994ee9b617 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45691 Reviewed-by: HAOUAS Elyes ehaouas@noos.fr Reviewed-by: Subrata Banik subrata.banik@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/skylake/acpi/gpio.asl 1 file changed, 34 insertions(+), 34 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved Subrata Banik: Looks good to me, approved
diff --git a/src/soc/intel/skylake/acpi/gpio.asl b/src/soc/intel/skylake/acpi/gpio.asl index c1f559e..f863fc7 100644 --- a/src/soc/intel/skylake/acpi/gpio.asl +++ b/src/soc/intel/skylake/acpi/gpio.asl @@ -22,29 +22,28 @@ /* GPIO Community 0 */ CreateDWordField (^RBUF, ^COM0._BAS, BAS0) CreateDWordField (^RBUF, ^COM0._LEN, LEN0) - Store (^^PCRB (PID_GPIOCOM0), BAS0) - Store (GPIO_BASE_SIZE, LEN0) + BAS0 = ^^PCRB (PID_GPIOCOM0) + LEN0 = GPIO_BASE_SIZE
/* GPIO Community 1 */ CreateDWordField (^RBUF, ^COM1._BAS, BAS1) CreateDWordField (^RBUF, ^COM1._LEN, LEN1) - Store (^^PCRB (PID_GPIOCOM1), BAS1) - Store (GPIO_BASE_SIZE, LEN1) + BAS1 = ^^PCRB (PID_GPIOCOM1) + LEN1 = GPIO_BASE_SIZE
/* GPIO Community 3 */ CreateDWordField (^RBUF, ^COM3._BAS, BAS3) CreateDWordField (^RBUF, ^COM3._LEN, LEN3) - Store (^^PCRB (PID_GPIOCOM3), BAS3) - Store (GPIO_BASE_SIZE, LEN3) + BAS3 = ^^PCRB (PID_GPIOCOM3) + LEN3 = GPIO_BASE_SIZE
CreateDWordField (^RBUF, ^GIRQ._INT, IRQN) - And (^^PCRR (PID_GPIOCOM0, GPIO_MISCCFG), - GPIO_DRIVER_IRQ_ROUTE_MASK, Local0) + Local0 = ^^PCRR (PID_GPIOCOM0, GPIO_MISCCFG) & GPIO_DRIVER_IRQ_ROUTE_MASK
- If (LEqual (Local0, GPIO_DRIVER_IRQ_ROUTE_IRQ14)) { - Store (GPIO_IRQ14, IRQN) + If (Local0 == GPIO_DRIVER_IRQ_ROUTE_IRQ14) { + IRQN = GPIO_IRQ14 } Else { - Store (GPIO_IRQ15, IRQN) + IRQN = GPIO_IRQ15 }
Return (RBUF) @@ -64,44 +63,45 @@ { #if CONFIG(SKYLAKE_SOC_PCH_H) /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23))) + If ((Arg0 >= GPP_A0) && (Arg0 <= GPP_B23)) { - Store (PID_GPIOCOM0, Local0) - Subtract (Arg0, GPP_A0, Local1) + Local0 = PID_GPIOCOM0 + Local1 = Arg0 - GPP_A0 } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_H23))) + If ((Arg0 >= GPP_C0) && (Arg0 <= GPP_H23)) { - Store (PID_GPIOCOM1, Local0) - Subtract (Arg0, GPP_C0, Local1) + Local0 = PID_GPIOCOM1 + Local1 = Arg0 - GPP_C0 } - /* GPIO Community 03 */ - If (LAnd (LGreaterEqual (Arg0, GPP_I0), LLessEqual (Arg0, GPP_I10))) + /* GPIO Community 3 */ + If ((Arg0 >= GPP_I0) && (Arg0 <= GPP_I10)) { - Store (PID_GPIOCOM3, Local0) - Subtract (Arg0, GPP_I0, Local1) + Local0 = PID_GPIOCOM3 + Local1 = Arg0 - GPP_I0 } #else /* GPIO Community 0 */ - If (LAnd (LGreaterEqual (Arg0, GPP_A0), LLessEqual (Arg0, GPP_B23))) + If ((Arg0 >= GPP_A0) && (Arg0 <= GPP_B23)) { - Store (PID_GPIOCOM0, Local0) - Subtract (Arg0, GPP_A0, Local1) + Local0 = PID_GPIOCOM0 + Local1 = Arg0 - GPP_A0 } /* GPIO Community 1 */ - If (LAnd (LGreaterEqual (Arg0, GPP_C0), LLessEqual (Arg0, GPP_E23))) + If ((Arg0 >= GPP_C0) && (Arg0 <= GPP_E23)) { - Store (PID_GPIOCOM1, Local0) - Subtract (Arg0, GPP_C0, Local1) + Local0 = PID_GPIOCOM1 + Local1 = Arg0 - GPP_C0 } - /* GPIO Community 03*/ - If (LAnd (LGreaterEqual (Arg0, GPP_F0), LLessEqual (Arg0, GPP_G7))) + /* GPIO Community 3 */ + If ((Arg0 >= GPP_F0) && (Arg0 <= GPP_G7)) { - Store (PID_GPIOCOM3, Local0) - Subtract (Arg0, GPP_F0, Local1) + Local0 = PID_GPIOCOM3 + Local1 = Arg0 - GPP_F0 } #endif /* CONFIG_SKYLAKE_SOC_PCH_H */ - Store (PCRB (Local0), Local2) - Add (Local2, PAD_CFG_BASE, Local2) - Return (Add (Local2, Multiply (Local1, 8))) + + Local2 = PCRB (Local0) + Local2 += PAD_CFG_BASE + Return (Local2 + (Local1 * 8)) }